iCE40/ghdl - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	netlists-builders: allow more null nets. Fix #1169	Tristan Gingold	2020-03-23	1	-2/+1
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*	synth: add id_inout gate to handle inout behaviour. Fir #1166	Tristan Gingold	2020-03-23	1	-0/+21
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*	synth-disp_vhdl: do not wrap inout ports. For #1166	Tristan Gingold	2020-03-22	1	-0/+2
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*	netlists: add id_nop gate.	Tristan Gingold	2020-03-22	1	-6/+21
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*	synth: handle numeric_std minimum/maximum. Fix #1168	Tristan Gingold	2020-03-21	1	-0/+9
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*	netlists-builders: allow null net for all dffs. Fix #1162	Tristan Gingold	2020-03-19	1	-2/+0
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*	netlists: handle more case of 0 sized nets.	Tristan Gingold	2020-03-13	1	-2/+0
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*	netlists: allow empty net for build_mux4	Tristan Gingold	2020-03-09	1	-1/+0
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*	netlists-builders: handle null operands for dyadic operations.	Tristan Gingold	2020-03-07	1	-1/+0
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*	synthesis: handle initialized output ports.	Tristan Gingold	2020-03-07	1	-2/+21
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*	netlists: rework memories to fix port orders, add a loop.	Tristan Gingold	2020-02-23	1	-18/+20
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*	netlists: add midff	Tristan Gingold	2020-02-20	1	-0/+33
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*	synth: add mdff.	Tristan Gingold	2020-02-17	1	-1/+29
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*	synth: avoid crash on incorrect slice direction. For #1116	Tristan Gingold	2020-01-26	1	-1/+0
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*	synth: improve support of 0-width nets and gates. Fix #1113	Tristan Gingold	2020-01-25	1	-2/+0
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*	synth: add id_abs gate. For #1101	Tristan Gingold	2020-01-20	1	-0/+1
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*	netlists-builders: relax assertion. Fix #1099	Tristan Gingold	2020-01-19	1	-1/+0
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*	netlists-builders: allow more gates with null bus. For #1080	Tristan Gingold	2020-01-12	1	-2/+0
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*	netlists: add enable port to id_mem_rd_sync.	Tristan Gingold	2019-12-05	1	-7/+14
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*	netlists: remove port API (make it easier to interface).	Tristan Gingold	2019-11-28	1	-54/+52
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*	synth: rework the sname API.	Tristan Gingold	2019-11-28	1	-55/+86
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*	netlists: add Get_Design.	Tristan Gingold	2019-11-28	1	-0/+6
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*	netlists: initial support of net of width 0.	Tristan Gingold	2019-11-12	1	-2/+0
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*	netlists: add dyn_insert_en gate.	Tristan Gingold	2019-11-11	1	-14/+48
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*	synth: extract netlists-folds from netlists-builders.	Tristan Gingold	2019-11-05	1	-133/+0
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*	netlists-builders: add build2_uresize.	Tristan Gingold	2019-11-03	1	-0/+24
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*	netlists: add formal input gates.	Tristan Gingold	2019-10-30	1	-0/+32
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*	synth: create build2_concat from netlists-concat.	Tristan Gingold	2019-10-27	1	-0/+36
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*	synth: generate cover for assertion precedent.	Tristan Gingold	2019-10-21	1	-17/+26
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*	synth: add netlists-memories to extract memories. Still WIP.	Tristan Gingold	2019-10-17	1	-15/+12
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*	netlists: declare memory gates.	Tristan Gingold	2019-10-15	1	-3/+159
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*	netlists-builders: adjust names of dyn_extract ports.	Tristan Gingold	2019-10-13	1	-2/+2
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*	netlists: rename id_memidx1 to id_memidx	Tristan Gingold	2019-10-03	1	-6/+6
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*	synth: replace memidx2 by addidx; handle some 2d arrays.	Tristan Gingold	2019-10-03	1	-25/+24
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*	synth: simplify dyn_insert.	Tristan Gingold	2019-10-02	1	-9/+4
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*	synth: simplify id_dyn_extract.	Tristan Gingold	2019-10-02	1	-8/+4
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*	synth: introduce memidx1	Tristan Gingold	2019-10-02	1	-8/+6
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*	netlists: add memidx1 and memidx2 gates.	Tristan Gingold	2019-10-02	1	-0/+77
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*	synth: add support for integer rem.	Tristan Gingold	2019-10-01	1	-0/+3
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*	synth: improve support of arrays or arrays. Fix #955	Tristan Gingold	2019-10-01	1	-4/+4
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*	synth: improve support of * and /. Fix #953	Tristan Gingold	2019-09-30	1	-0/+6
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*	synth: add support for mod operator.	Tristan Gingold	2019-09-28	1	-2/+7
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*	synth: rework type for expression.	Tristan Gingold	2019-09-25	1	-1/+3
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*	synth: handle rotate.	Tristan Gingold	2019-09-22	1	-10/+14
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*	synth: Add support for PSL cover directive (#930)	T. Meissner	2019-09-19	1	-3/+20
\| \| \| \| \| \|	* synth: Add support for PSL cover directive * testsuite/synth: Add tests for PSL cover directives
*	synth: remove value_mux2.	Tristan Gingold	2019-09-18	1	-3/+5
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*	synth: add build2_const_vec	Tristan Gingold	2019-09-15	1	-0/+18
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*	synth: allow empty string literal.	Tristan Gingold	2019-09-12	1	-1/+0
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*	synth: handle unsigned shift left.	Tristan Gingold	2019-09-11	1	-0/+26
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*	synth: add const_x gate.	Tristan Gingold	2019-09-11	1	-0/+18
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