| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Adjusted to renaming in pyVHDLModel. | Patrick Lehmann | 2021-08-23 | 1 | -1/+0 |
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| * | Added package declarations inside of declarations. | Patrick Lehmann | 2021-07-01 | 1 | -0/+21 |
| | | | | | | Added PSL Default clock (dummy). Added Disconnect specification (dummy). | ||||
| * | Preparations for PSL. | Patrick Lehmann | 2021-07-01 | 1 | -0/+112 |
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index : iCE40/ghdl | |
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