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* trans-chap9.adb: fix out of scope reference.Tristan Gingold2021-04-101-2/+3
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* testsuite/gna: add a test for #1718Tristan Gingold2021-04-102-0/+20
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* ghdldrv,configure: allow LIB.UNIT name for -e/-r commands. Fix #1718Tristan Gingold2021-04-108-38/+129
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* src/grt: Avhpi - Specify enum numbers as in VHDL LRM. Add 2008 version ↵Ondrej Ille2021-04-081-5/+483
| | | | enumerations. Update "DEPRECATED" suffices.
* testsuite: Adjust regression for new format of PSL report.Ondrej Ille2021-04-082-6/+12
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* src: Fix PSL start count assignment for PSL endpoints.Ondrej Ille2021-04-081-9/+9
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* src: Introduce two separate PSL counters (Finish and Start).Ondrej Ille2021-04-085-19/+57
| | | | | | Finish counter corresponds to legacy count. Start counter corresponds to number of times start state is left (assertion is triggered).
* src: Adjust grt-psl to use PSL RTI type.Ondrej Ille2021-04-081-5/+5
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* src: Adjust disp-rti for new PSL RTI type.Ondrej Ille2021-04-081-12/+27
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* src: grt-utils. Fix path look-up fo PSL RTis since they now have Parent.Ondrej Ille2021-04-082-8/+7
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* src: Define PSL type RTI with simplified assertion state.Ondrej Ille2021-04-085-6/+110
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* grt: Dont build path for PSL RTIs. They dont have parents, therefore ↵Ondrej Ille2021-04-081-0/+12
| | | | Get_Path_Name crashes.
* testsuite/gna: add a test for #1715Tristan Gingold2021-04-073-0/+80
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* vhdl-sem_decls.adb: handle both anonymous signal and signal attribute. Fix ↵Tristan Gingold2021-04-071-0/+2
| | | | #1715
* testsuite: Adjust regression for caret-diagnostics on by default.Ondrej Ille2021-04-053-0/+14
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* src: Set fcaret-diagnostics to be on by default. Clean unused Warn_Undriven.Ondrej Ille2021-04-051-4/+1
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* src: Remove obsolete FIXME, file_open_information parsed. Default ↵Ondrej Ille2021-04-051-1/+0
| | | | "IN"/"READ_MODE" behavior of file implemented.
* testsuite.py: set exit statusTristan Gingold2021-04-051-1/+5
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* ghdlsynth.adb: fix a previous commitTristan Gingold2021-04-051-1/+1
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* testsuite/gna: add more tests for #1708Tristan Gingold2021-04-056-0/+176
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* vhdl-sem_psl.adb: handle goto/equal repeated sequence. For #1708Tristan Gingold2021-04-051-8/+20
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* vhdl-parse_psl.adb: handle parenthesis boolean prefixes. For #1708Tristan Gingold2021-04-051-29/+62
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* vhdl and libraries: add support for binding to a foreign moduleTristan Gingold2021-04-057-124/+237
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* ghdldrv/: initial support for foreign modulesTristan Gingold2021-04-055-11/+28
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* vhdl: add Iir_Kind_Foreign_ModuleTristan Gingold2021-04-0511-631/+757
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* pnodes.py: fix a typoTristan Gingold2021-04-051-1/+1
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* psl-subsets: fix fallout of #1708Tristan Gingold2021-04-031-2/+3
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* src: Better reporting of missing parenthesis.Ondrej Ille2021-04-031-5/+24
| | | | If multiple are missing, report only once and total missing count.
* src: Add Resync_To_End_Of_External_Name.Ondrej Ille2021-04-031-1/+21
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* testsuite/gna: add a test for #1708Tristan Gingold2021-04-032-0/+44
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* psl: prefix of goto/non-consecutive repetition is a bool. Fix #1708Tristan Gingold2021-04-036-58/+118
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* vhdl-parse.adb: fix indentation (for #1711)Tristan Gingold2021-04-031-30/+31
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* src: More detailed message on invalid variable locations.Ondrej Ille2021-04-031-12/+46
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* src: Provide nicer message if Tok_Is is swapped with Tok_Assign for alias.Ondrej Ille2021-04-031-2/+6
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* Add base support for the attribue element in vhdl 08Anselmo952021-04-036-0/+136
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* testsuite/gna: add a testcase for #1704Tristan Gingold2021-04-025-0/+82
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* doc/using: document synth option '--out' (#1705)Unai Martinez-Corral2021-03-311-7/+26
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* testsuite/gna: add a test for #1697Tristan Gingold2021-03-304-0/+49
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* vhdl-sem_expr.adb: detect incorrect static aggregate length mismatch. For #1697Tristan Gingold2021-03-301-1/+9
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* testsuite/synth: add a test for #1703Tristan Gingold2021-03-292-0/+44
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* netlists-disp_vhdl: do not display edge net when not needed. Fix #1703Tristan Gingold2021-03-293-25/+49
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* ghdlsynth: add --out=raw-vhdl. For #1702Tristan Gingold2021-03-291-7/+7
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* ci/msys2: MINGW_INSTALLS is deprecated, use MINGW_ARCH insteadumarcor2021-03-291-1/+1
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* vhdl-parse_psl: avoid crash in case of error. For #1701Tristan Gingold2021-03-281-3/+8
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* vhdl-parse_psl: minor reformatingTristan Gingold2021-03-281-10/+9
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* src: Handle also Equal Repeat and Goto repeat sequences. Keep TODO about ↵Ondrej Ille2021-03-281-5/+5
| | | | check of simple combinatorial expression/
* testsuite: Update indexOndrej Ille2021-03-282-0/+0
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* testsuite: Add test for #1700Ondrej Ille2021-03-282-0/+49
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* src: Un-handle Equal and Goto repeat sequences in sem_property. Some form of ↵Ondrej Ille2021-03-281-10/+5
| | | | check that SERE is only boolean is needed.
* src: Psl, check positive count range already during parsing.Ondrej Ille2021-03-281-0/+16
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