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Diffstat (limited to 'testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models')
6 files changed, 431 insertions, 0 deletions
diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models/ccvs.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models/ccvs.ams new file mode 100644 index 000000000..65ba60b3e --- /dev/null +++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models/ccvs.ams @@ -0,0 +1,71 @@ + +-- Copyright (C) 2000-2002 The University of Cincinnati. +-- All rights reserved. + +-- This file is part of VESTs (Vhdl tESTs). + +-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE +-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE +-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, +-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY +-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR +-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. + +-- By using or copying this Software, Licensee agrees to abide by the +-- intellectual property laws, and all other applicable laws of the U.S., +-- and the terms of this license. + +-- You may modify, distribute, and use the software contained in this +-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2, +-- June 1991. A copy of this license agreement can be found in the file +-- "COPYING", distributed with this archive. + +-- You should have received a copy of the GNU General Public License +-- along with VESTs; if not, write to the Free Software Foundation, +-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +-- --------------------------------------------------------------------- +-- +-- $Id: ccvs.ams,v 1.1 2002-03-27 22:11:19 paw Exp $ +-- $Revision: 1.1 $ +-- +-- --------------------------------------------------------------------- + +PACKAGE electricalSystem IS + NATURE electrical IS real ACROSS real THROUGH Ground reference; + FUNCTION SIN(X : real) RETURN real; + FUNCTION EXP(X : real) RETURN real; + FUNCTION SQRT(X : real) RETURN real; + FUNCTION POW(X,Y : real) RETURN real; +END PACKAGE electricalSystem; + +use work.electricalsystem.all; + +--entity declaration + +ENTITY RLC IS + +END RLC; + +--architecture declaration + +ARCHITECTURE behavior OF RLC IS + + terminal n1, n2 : electrical; + quantity is1 through n1; + quantity vr1 across ir1 through n1; + quantity vr2 across ir2 through n2; + quantity vs1 across n2; + constant r1 : REAL := 20.0; + constant r2 : REAL := 10.0; + constant r3 : REAL := 5.0; + +BEGIN + +res1 : vr1 == ir1 * r1; +res2 : vs1 == ir1 * r2; +res3 : vr2 == ir2 * r3; +vsrc : is1 == 5.0 * sin(2.0 * 3.1415 * 10.0 --sine source + * real(time'pos(now)) * 1.0e-15); + +END architecture behavior; diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models/parallel.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models/parallel.ams new file mode 100644 index 000000000..0fbe03138 --- /dev/null +++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models/parallel.ams @@ -0,0 +1,72 @@ + +-- Copyright (C) 2000-2002 The University of Cincinnati. +-- All rights reserved. + +-- This file is part of VESTs (Vhdl tESTs). + +-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE +-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE +-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, +-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY +-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR +-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. + +-- By using or copying this Software, Licensee agrees to abide by the +-- intellectual property laws, and all other applicable laws of the U.S., +-- and the terms of this license. + +-- You may modify, distribute, and use the software contained in this +-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2, +-- June 1991. A copy of this license agreement can be found in the file +-- "COPYING", distributed with this archive. + +-- You should have received a copy of the GNU General Public License +-- along with VESTs; if not, write to the Free Software Foundation, +-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +-- --------------------------------------------------------------------- +-- +-- $Id: parallel.ams,v 1.1 2002-03-27 22:11:19 paw Exp $ +-- $Revision: 1.1 $ +-- +-- --------------------------------------------------------------------- + +PACKAGE electricalSystem IS + NATURE electrical IS real ACROSS real THROUGH Ground reference; + FUNCTION SIN(X : real) RETURN real; + FUNCTION EXP(X : real) RETURN real; + FUNCTION SQRT(X : real) RETURN real; + FUNCTION POW(X,Y : real) RETURN real; +END PACKAGE electricalSystem; + +use work.electricalsystem.all; + +--entity declaration + +ENTITY RLC IS + +END RLC; + +--architecture declaration + +ARCHITECTURE behavior OF RLC IS + + terminal n1 : electrical; + + quantity vr1 across ir1 through n1 ; + quantity vr2 across ir2 through n1; + quantity vr3 across ir3 through n1; + quantity vs across n1; + constant r1 : REAL := 10.0; + constant r2 : REAL := 20.0; + constant r3 : REAL := 50.0; + +BEGIN + +res1 : vr1 == ir1 * r1; +res2 : vr2 == ir2 * r2; +res3 : vr3 == ir3 * r3; +vsrc : vs == 5.0 * sin(2.0 * 3.1415 * 10.0 --sine source + * real(time'pos(now)) * 1.0e-9); + +END architecture behavior; diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models/series-parallel.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models/series-parallel.ams new file mode 100644 index 000000000..a5f537f31 --- /dev/null +++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models/series-parallel.ams @@ -0,0 +1,75 @@ + +-- Copyright (C) 2000-2002 The University of Cincinnati. +-- All rights reserved. + +-- This file is part of VESTs (Vhdl tESTs). + +-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE +-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE +-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, +-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY +-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR +-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. + +-- By using or copying this Software, Licensee agrees to abide by the +-- intellectual property laws, and all other applicable laws of the U.S., +-- and the terms of this license. + +-- You may modify, distribute, and use the software contained in this +-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2, +-- June 1991. A copy of this license agreement can be found in the file +-- "COPYING", distributed with this archive. + +-- You should have received a copy of the GNU General Public License +-- along with VESTs; if not, write to the Free Software Foundation, +-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +-- --------------------------------------------------------------------- +-- +-- $Id: series-parallel.ams,v 1.1 2002-03-27 22:11:19 paw Exp $ +-- $Revision: 1.1 $ +-- +-- --------------------------------------------------------------------- + +PACKAGE electricalSystem IS + NATURE electrical IS real ACROSS real THROUGH Ground reference; + FUNCTION SIN(X : real) RETURN real; + FUNCTION EXP(X : real) RETURN real; + FUNCTION SQRT(X : real) RETURN real; + FUNCTION POW(X,Y : real) RETURN real; +END PACKAGE electricalSystem; + +use work.electricalsystem.all; + +--entity declaration + +ENTITY RLC IS + +END RLC; + +--architecture declaration + +ARCHITECTURE behavior OF RLC IS + + terminal n1, n2 : electrical; + + quantity vr1 across ir1 through n1 to n2; + + quantity vr2 across ir2 through n2 to electrical'reference; + --supposedly this works !!!! + --quantity vr2 across ir2 through n2 to ground; + quantity vr3 across ir3 through n2; + quantity vs across n1; + constant r1 : REAL := 20.0; + constant r2 : REAL := 10.0; + constant r3 : REAL := 5.0; + +BEGIN + +res1 : vr1 == ir1 * r1; +res2 : vr2 == ir2 * r2; +res3 : vr3 == ir3 * r3; +vsrc : vs == 5.0 * sin(2.0 * 3.1415 * 10.0 --sine source + * real(time'pos(now)) * 1.0e-9); + +END architecture behavior; diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models/series.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models/series.ams new file mode 100644 index 000000000..9dbb7626e --- /dev/null +++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models/series.ams @@ -0,0 +1,73 @@ + +-- Copyright (C) 2000-2002 The University of Cincinnati. +-- All rights reserved. + +-- This file is part of VESTs (Vhdl tESTs). + +-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE +-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE +-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, +-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY +-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR +-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. + +-- By using or copying this Software, Licensee agrees to abide by the +-- intellectual property laws, and all other applicable laws of the U.S., +-- and the terms of this license. + +-- You may modify, distribute, and use the software contained in this +-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2, +-- June 1991. A copy of this license agreement can be found in the file +-- "COPYING", distributed with this archive. + +-- You should have received a copy of the GNU General Public License +-- along with VESTs; if not, write to the Free Software Foundation, +-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +-- --------------------------------------------------------------------- +-- +-- $Id: series.ams,v 1.1 2002-03-27 22:11:19 paw Exp $ +-- $Revision: 1.1 $ +-- +-- --------------------------------------------------------------------- + +PACKAGE electricalSystem IS + NATURE electrical IS real ACROSS real THROUGH Ground reference; + FUNCTION SIN(X : real) RETURN real; + FUNCTION EXP(X : real) RETURN real; + FUNCTION SQRT(X : real) RETURN real; + FUNCTION POW(X,Y : real) RETURN real; +END PACKAGE electricalSystem; + +use work.electricalsystem.all; + +--entity declaration + +ENTITY RLC IS + +END RLC; + +--architecture declaration + +ARCHITECTURE behavior OF RLC IS + + terminal n1, n2, n3 : electrical; + + quantity vr1 across ir1 through n1 to n2; + quantity vr2 across ir2 through n2 to n3; + quantity vr3 across ir3 through n3; + quantity vs across n1; + constant r1 : REAL := 10.0; + constant r2 : REAL := 20.0; + constant r3 : REAL := 50.0; + +BEGIN + +res1 : vr1 == ir1 * r1; +res2 : vr2 == ir2 * r2; +res3 : vr3 == ir3 * r3; +cons : ir1 == ir2; +vsrc : vs == 5.0 * sin(2.0 * 3.1415 * 10.0 --sine source + * real(time'pos(now)) * 1.0e-9); + +END architecture behavior; diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models/vccs.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models/vccs.ams new file mode 100644 index 000000000..3c2cc9a00 --- /dev/null +++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models/vccs.ams @@ -0,0 +1,72 @@ + +-- Copyright (C) 2000-2002 The University of Cincinnati. +-- All rights reserved. + +-- This file is part of VESTs (Vhdl tESTs). + +-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE +-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE +-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, +-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY +-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR +-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. + +-- By using or copying this Software, Licensee agrees to abide by the +-- intellectual property laws, and all other applicable laws of the U.S., +-- and the terms of this license. + +-- You may modify, distribute, and use the software contained in this +-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2, +-- June 1991. A copy of this license agreement can be found in the file +-- "COPYING", distributed with this archive. + +-- You should have received a copy of the GNU General Public License +-- along with VESTs; if not, write to the Free Software Foundation, +-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +-- --------------------------------------------------------------------- +-- +-- $Id: vccs.ams,v 1.1 2002-03-27 22:11:19 paw Exp $ +-- $Revision: 1.1 $ +-- +-- --------------------------------------------------------------------- + +PACKAGE electricalSystem IS + NATURE electrical IS real ACROSS real THROUGH Ground reference; + FUNCTION SIN(X : real) RETURN real; + FUNCTION EXP(X : real) RETURN real; + FUNCTION SQRT(X : real) RETURN real; + FUNCTION POW(X,Y : real) RETURN real; +END PACKAGE electricalSystem; + +use work.electricalsystem.all; + +--entity declaration + +ENTITY RLC IS + +END RLC; + +--architecture declaration + +ARCHITECTURE behavior OF RLC IS + +constant R1: real :=20.0; +constant R2: real :=10.0; +constant R3: real :=5.0; +terminal T1,T2,T3:electrical; +quantity Vs1 across T1; +quantity Is1 through T2; +quantity Vr1 across Ir1 through T2 to T3; +quantity Vr2 across Ir2 through T3; + +BEGIN + + +res1 : vr1 == ir1 * r1; +res2 : vr2 == ir2 * r2; +res3 : is1 == vs1 * r3; +vsrc : vs1 == 5.0 * sin(2.0 * 3.1415 * 10.0 --sine source + * real(time'pos(now)) * 1.0e-15); + +END architecture behavior; diff --git a/testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models/vcvs.ams b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models/vcvs.ams new file mode 100644 index 000000000..24ee97232 --- /dev/null +++ b/testsuite/vests/vhdl-ams/ad-hoc/fromUC/resistor_models/vcvs.ams @@ -0,0 +1,68 @@ + +-- Copyright (C) 2000-2002 The University of Cincinnati. +-- All rights reserved. + +-- This file is part of VESTs (Vhdl tESTs). + +-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE +-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE +-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, +-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY +-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR +-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. + +-- By using or copying this Software, Licensee agrees to abide by the +-- intellectual property laws, and all other applicable laws of the U.S., +-- and the terms of this license. + +-- You may modify, distribute, and use the software contained in this +-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2, +-- June 1991. A copy of this license agreement can be found in the file +-- "COPYING", distributed with this archive. + +-- You should have received a copy of the GNU General Public License +-- along with VESTs; if not, write to the Free Software Foundation, +-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +-- --------------------------------------------------------------------- +-- +-- $Id: vcvs.ams,v 1.1 2002-03-27 22:11:19 paw Exp $ +-- $Revision: 1.1 $ +-- +-- --------------------------------------------------------------------- + +PACKAGE electricalSystem IS + NATURE electrical IS real ACROSS real THROUGH Ground reference; + FUNCTION SIN(X : real) RETURN real; + FUNCTION EXP(X : real) RETURN real; + FUNCTION SQRT(X : real) RETURN real; + FUNCTION POW(X,Y : real) RETURN real; +END PACKAGE electricalSystem; + +use work.electricalsystem.all; + +--entity declaration + +ENTITY RLC IS + +END RLC; + +--architecture declaration + +ARCHITECTURE behavior OF RLC IS + +constant R1: real :=20.0; +constant R3: real :=10.0; +terminal T1,T2,T3:electrical; +quantity Vr2 across T2; +quantity Vr3 across Ir3 through T2; +quantity Vs across T1; + +BEGIN + +vol1 : Vr2 == Vs * r1; +res3 : vr3 == ir3 * r3; +vsrc : Vs == 5.0 * sin(2.0 * 3.1415 * 10.0 --sine source + * real(time'pos(now)) * 1.0e-15); + +END architecture behavior; |