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diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/write_bit_vector.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/textio/write/write_bit_vector.vhdl
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+
+-- Copyright (C) Clifton Labs. All rights reserved.
+
+-- CLIFTON LABS MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE
+-- SUITABILITY OF THE SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT
+-- NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+-- PARTICULAR PURPOSE, OR NON-INFRINGEMENT. CLIFTON LABS SHALL NOT BE
+-- LIABLE FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, RESULT
+-- OF USING, MODIFYING OR DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES.
+
+-- By using or copying this Software, Licensee agrees to abide by the
+-- intellectual property laws, and all other applicable laws of the U.S.,
+-- and the terms of this license.
+
+-- You may modify, distribute, and use the software contained in this
+-- package under the terms of the GNU General Public License as published
+-- by the Free Software Foundation; version 2 of the License.
+
+-- You should have received a copy of the GNU General Public License along
+-- with this software; if not, write to the Free Software Foundation, Inc.,
+-- 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+entity write_bit_vector_test is
+end write_bit_vector_test;
+
+use std.textio.all;
+
+architecture test0 of write_bit_vector_test is
+
+begin
+ doit: process
+ variable outline : line;
+ begin
+ write( outline, bit_vector'("1010") );
+ writeline( output, outline );
+
+ report "PASSED TEST: write_bit_vector."
+ severity NOTE;
+
+ wait;
+ end process;
+
+end test0;