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-rw-r--r--testsuite/vests/vhdl-93/ashenden/non_compliant/ch_02_ch_02_01.vhd597
-rw-r--r--testsuite/vests/vhdl-93/ashenden/non_compliant/ch_03_ch_03_09.vhd79
-rw-r--r--testsuite/vests/vhdl-93/ashenden/non_compliant/ch_03_ch_03_15.vhd53
-rw-r--r--testsuite/vests/vhdl-93/ashenden/non_compliant/ch_04_ch_04_03.vhd131
-rw-r--r--testsuite/vests/vhdl-93/ashenden/non_compliant/ch_04_ch_04_09.vhd86
-rw-r--r--testsuite/vests/vhdl-93/ashenden/non_compliant/ch_17_fg_17_12.vhd88
-rw-r--r--testsuite/vests/vhdl-93/ashenden/non_compliant/ch_17_fg_17_14.vhd85
-rw-r--r--testsuite/vests/vhdl-93/ashenden/non_compliant/ch_17_fg_17_16.vhd106
-rw-r--r--testsuite/vests/vhdl-93/ashenden/non_compliant/non_compliant.exp50
9 files changed, 1275 insertions, 0 deletions
diff --git a/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_02_ch_02_01.vhd b/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_02_ch_02_01.vhd
new file mode 100644
index 000000000..0f0263ccf
--- /dev/null
+++ b/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_02_ch_02_01.vhd
@@ -0,0 +1,597 @@
+
+-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- VESTs is free software; you can redistribute it and/or modify it
+-- under the terms of the GNU General Public License as published by the
+-- Free Software Foundation; either version 2 of the License, or (at
+-- your option) any later version.
+
+-- VESTs is distributed in the hope that it will be useful, but WITHOUT
+-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+-- for more details.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: ch_02_ch_02_01.vhd,v 1.2 2001-10-26 16:29:37 paw Exp $
+-- $Revision: 1.2 $
+--
+-- ---------------------------------------------------------------------
+
+entity ch_02_01 is
+
+end entity ch_02_01;
+
+
+----------------------------------------------------------------
+
+
+architecture test of ch_02_01 is
+begin
+
+
+ section_2_1_a : process is
+
+ -- code from book:
+
+ constant number_of_bytes : integer := 4;
+ constant number_of_bits : integer := 8 * number_of_bytes;
+ constant e : real := 2.718281828;
+ constant prop_delay : time := 3 ns;
+ constant size_limit, count_limit : integer := 255;
+
+ --
+
+ variable index : integer := 0;
+ variable sum, average, largest : real;
+ variable start, finish : time := 0 ns;
+
+ -- end of code from book
+
+ begin
+ wait;
+ end process section_2_1_a;
+
+
+ ----------------
+
+
+ section_2_1_b : process is
+
+ -- code from book:
+
+ variable start : time := 0 ns;
+ variable finish : time := 0 ns;
+
+ -- end of code from book
+
+ variable program_counter : integer;
+ variable index : integer;
+
+ begin
+
+ -- code from book:
+
+ program_counter := 0;
+ index := index + 1;
+
+ -- end of code from book
+
+ wait;
+ end process section_2_1_b;
+
+
+ ----------------
+
+
+ section_2_2_a : process is
+
+ -- code from book:
+
+ type apples is range 0 to 100;
+ type oranges is range 0 to 100;
+
+ --
+
+ type day_of_month is range 0 to 31;
+ type year is range 0 to 2100;
+
+ variable today : day_of_month := 9;
+ variable start_year : year := 1987;
+
+ --
+
+ constant number_of_bits : integer := 32;
+ type bit_index is range 0 to number_of_bits - 1;
+
+ --
+
+ type set_index_range is range 21 downto 11;
+ type mode_pos_range is range 5 to 7;
+ variable set_index : set_index_range;
+ variable mode_pos : mode_pos_range;
+
+ --
+
+ type input_level is range -10.0 to +10.0;
+ type probability is range 0.0 to 1.0;
+
+ --
+
+ variable input_A : input_level;
+
+ -- end of code from book
+
+ begin
+
+ -- code from book:
+
+ -- error: Incompatible types for assignment
+ -- start_year := today;
+
+ -- end of code from book
+
+ wait;
+ end process section_2_2_a;
+
+
+ ----------------
+
+
+ section_2_2_b : process is
+
+ -- code from book:
+
+ type resistance is range 0 to 1E9
+ units
+ ohm;
+ end units resistance;
+
+ -- end of code from book
+
+ begin
+ wait;
+ end process section_2_2_b;
+
+
+ ----------------
+
+
+ section_2_2_c : process is
+
+ -- code from book:
+
+ type resistance is range 0 to 1E9
+ units
+ ohm;
+ kohm = 1000 ohm;
+ Mohm = 1000 kohm;
+ end units resistance;
+
+ -- end of code from book
+
+ begin
+ wait;
+ end process section_2_2_c;
+
+
+ ----------------
+
+
+ section_2_2_d : process is
+
+ -- code from book:
+
+ type length is range 0 to 1E9
+ units
+ um; -- primary unit: micron
+ mm = 1000 um; -- metric units
+ m = 1000 mm;
+ mil = 254 um; -- imperial units
+ inch = 1000 mil;
+ end units length;
+
+ -- end of code from book
+
+ begin
+ wait;
+ end process section_2_2_d;
+
+
+ ----------------
+
+
+ section_2_2_e : process is
+
+ -- code from book:
+
+ -- type time is range implementation_defined
+ type time is range integer'low to integer'high
+ units
+ fs;
+ ps = 1000 fs;
+ ns = 1000 ps;
+ us = 1000 ns;
+ ms = 1000 us;
+ sec = 1000 ms;
+ min = 60 sec;
+ hr = 60 min;
+ end units;
+
+ -- end of code from book
+
+ begin
+ wait;
+ end process section_2_2_e;
+
+
+ ----------------
+
+
+ section_2_2_f : process is
+
+ -- code from book:
+
+ type alu_function is (disable, pass, add, subtract, multiply, divide);
+
+ --
+
+ type octal_digit is ('0', '1', '2', '3', '4', '5', '6', '7');
+
+ --
+
+ variable alu_op : alu_function;
+ variable last_digit : octal_digit := '0';
+
+ --
+
+ type logic_level is (unknown, low, undriven, high);
+ variable control : logic_level;
+ type water_level is (dangerously_low, low, ok);
+ variable water_sensor : water_level;
+
+ -- end of code from book
+
+ begin
+
+ -- code from book:
+
+ alu_op := subtract;
+ last_digit := '7';
+
+ --
+
+ control := low;
+ water_sensor := low;
+
+ -- end of code from book
+
+ wait;
+ end process section_2_2_f;
+
+
+ ----------------
+
+
+ section_2_2_g : process is
+
+ -- code from book:
+
+ type severity_level is (note, warning, error, failure);
+
+ -- end of code from book
+
+ begin
+ wait;
+ end process section_2_2_g;
+
+
+ ----------------
+
+
+ section_2_2_h : process is
+
+ -- code from book:
+
+ variable cmd_char, terminator : character;
+
+ -- end of code from book
+
+ begin
+
+ -- code from book:
+
+ cmd_char := 'P';
+ terminator := cr;
+
+ -- end of code from book
+
+ wait;
+ end process section_2_2_h;
+
+
+ ----------------
+
+
+ section_2_2_i : process is
+
+ -- code from book:
+
+ type boolean is (false, true);
+
+ --
+
+ type bit is ('0', '1');
+
+ -- end of code from book
+
+ begin
+ wait;
+ end process section_2_2_i;
+
+
+ ----------------
+
+
+ section_2_2_j : process is
+
+ variable write_enable_n, select_reg_n, write_reg_n : bit;
+
+ begin
+
+ -- code from book:
+
+ write_reg_n := not ( not write_enable_n and not select_reg_n );
+
+ -- end of code from book
+
+ wait;
+ end process section_2_2_j;
+
+
+ ----------------
+
+
+ section_2_2_k : process is
+
+ -- code from book:
+
+ type std_ulogic is ( 'U', -- Uninitialized
+ 'X', -- Forcing Unknown
+ '0', -- Forcing zero
+ '1', -- Forcing one
+ 'Z', -- High Impedance
+ 'W', -- Weak Unknown
+ 'L', -- Weak zero
+ 'H', -- Weak one
+ '-' ); -- Don't care
+
+ -- end of code from book
+
+ begin
+ wait;
+ end process section_2_2_k;
+
+
+ ----------------
+
+
+ section_2_3_a : process is
+
+ -- code from book:
+
+ subtype small_int is integer range -128 to 127;
+
+ --
+
+ variable deviation : small_int;
+ variable adjustment : integer;
+
+ --
+
+ subtype bit_index is integer range 31 downto 0;
+
+ -- end of code from book
+
+ begin
+
+ deviation := 0;
+ adjustment := 0;
+
+ -- code from book:
+
+ deviation := deviation + adjustment;
+
+ -- end of code from book
+
+ wait;
+ end process section_2_3_a;
+
+
+ ----------------
+
+
+ section_2_3_b : process is
+
+ constant highest_integer : integer := integer'high;
+
+ constant highest_time : time := time'high;
+
+ -- code from book:
+
+ subtype natural is integer range 0 to highest_integer;
+ subtype positive is integer range 1 to highest_integer;
+
+ --
+
+ subtype delay_length is time range 0 fs to highest_time;
+
+ -- end of code from book
+
+ begin
+ wait;
+ end process section_2_3_b;
+
+
+ ----------------
+
+
+ section_2_3_c : process is
+
+ -- code from book:
+
+ type logic_level is (unknown, low, undriven, high);
+ type system_state is (unknown, ready, busy);
+
+ --
+
+ subtype valid_level is logic_level range low to high;
+
+ -- end of code from book
+
+ begin
+ wait;
+ end process section_2_3_c;
+
+
+ ----------------
+
+
+ section_2_4_a : process is
+
+ -- code from book:
+
+ type resistance is range 0 to 1E9
+ units
+ ohm;
+ kohm = 1000 ohm;
+ Mohm = 1000 kohm;
+ end units resistance;
+
+ type set_index_range is range 21 downto 11;
+
+ type logic_level is (unknown, low, undriven, high);
+
+ -- end of code from book
+
+ begin
+
+ -- output from vsim: "2000"
+ report resistance'image(2 kohm);
+
+ -- code from book:
+
+ assert resistance'left = 0 ohm;
+ assert resistance'right = 1E9 ohm;
+ assert resistance'low = 0 ohm;
+ assert resistance'high = 1E9 ohm;
+ assert resistance'ascending = true;
+ assert resistance'image(2 kohm) = "2000 ohm";
+ assert resistance'value("5 Mohm") = 5_000_000 ohm;
+
+ assert set_index_range'left = 21;
+ assert set_index_range'right = 11;
+ assert set_index_range'low = 11;
+ assert set_index_range'high = 21;
+ assert set_index_range'ascending = false;
+ assert set_index_range'image(14) = "14";
+ assert set_index_range'value("20") = 20;
+
+ assert logic_level'left = unknown;
+ assert logic_level'right = high;
+ assert logic_level'low = unknown;
+ assert logic_level'high = high;
+ assert logic_level'ascending = true;
+ assert logic_level'image(undriven) = "undriven";
+ assert logic_level'value("Low") = low;
+
+ --
+
+ assert logic_level'pos(unknown) = 0;
+ assert logic_level'val(3) = high;
+ assert logic_level'succ(unknown) = low;
+ assert logic_level'pred(undriven) = low;
+
+ --
+
+ assert time'pos(4 ns) = 4_000_000;
+
+ -- end of code from book
+
+ wait;
+ end process section_2_4_a;
+
+
+ ----------------
+
+
+ section_2_4_b : process is
+
+ -- code from book:
+
+ type length is range integer'low to integer'high
+ units
+ mm;
+ end units length;
+
+ type area is range integer'low to integer'high
+ units
+ square_mm;
+ end units area;
+
+ --
+
+ variable L1, L2 : length;
+ variable A : area;
+
+ -- end of code from book
+
+ begin
+
+ -- code from book:
+
+ -- error: No feasible entries for infix op: "*"
+ -- A := L1 * L2; -- this is incorrect
+
+ --
+
+ A := area'val( length'pos(L1) * length'pos(L2) );
+
+ -- end of code from book
+
+ wait;
+ end process section_2_4_b;
+
+
+ ----------------
+
+
+ section_2_4_c : process is
+
+ -- code from book:
+
+ type opcode is (nop, load, store, add, subtract, negate, branch, halt);
+ subtype arith_op is opcode range add to negate;
+
+ -- end of code from book
+
+ begin
+
+ -- code from book:
+
+ assert arith_op'base'left = nop;
+ assert arith_op'base'succ(negate) = branch;
+
+ -- end of code from book
+
+ wait;
+ end process section_2_4_c;
+
+
+end architecture test;
diff --git a/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_03_ch_03_09.vhd b/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_03_ch_03_09.vhd
new file mode 100644
index 000000000..1307b47a0
--- /dev/null
+++ b/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_03_ch_03_09.vhd
@@ -0,0 +1,79 @@
+
+-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- VESTs is free software; you can redistribute it and/or modify it
+-- under the terms of the GNU General Public License as published by the
+-- Free Software Foundation; either version 2 of the License, or (at
+-- your option) any later version.
+
+-- VESTs is distributed in the hope that it will be useful, but WITHOUT
+-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+-- for more details.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: ch_03_ch_03_09.vhd,v 1.2 2001-10-26 16:29:37 paw Exp $
+-- $Revision: 1.2 $
+--
+-- ---------------------------------------------------------------------
+
+entity ch_03_09 is
+
+end entity ch_03_09;
+
+
+----------------------------------------------------------------
+
+
+architecture test of ch_03_09 is
+begin
+
+
+ process_3_2_d : process is
+
+ -- code from book:
+
+ variable N : integer := 1;
+
+ --
+
+ constant C : integer := 1;
+
+ -- end of code from book
+
+ constant expression : integer := 7;
+
+ begin
+
+ -- code from book:
+
+ -- error: Case choice must be a locally static expression
+
+ -- case expression is -- example of an illegal case statement
+ -- when N | N+1 => -- . . .
+ -- when N+2 to N+5 => -- . . .
+ -- when others => -- . . .
+ -- end case;
+
+ --
+
+ case expression is
+ when C | C+1 => -- . . .
+ when C+2 to C+5 => -- . . .
+ when others => -- . . .
+ end case;
+
+ -- end of code from book
+
+ wait;
+ end process process_3_2_d;
+
+
+end architecture test;
diff --git a/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_03_ch_03_15.vhd b/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_03_ch_03_15.vhd
new file mode 100644
index 000000000..6b5b3e0d8
--- /dev/null
+++ b/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_03_ch_03_15.vhd
@@ -0,0 +1,53 @@
+
+-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- VESTs is free software; you can redistribute it and/or modify it
+-- under the terms of the GNU General Public License as published by the
+-- Free Software Foundation; either version 2 of the License, or (at
+-- your option) any later version.
+
+-- VESTs is distributed in the hope that it will be useful, but WITHOUT
+-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+-- for more details.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: ch_03_ch_03_15.vhd,v 1.2 2001-10-26 16:29:37 paw Exp $
+-- $Revision: 1.2 $
+--
+-- ---------------------------------------------------------------------
+
+entity ch_03_15 is
+
+end entity ch_03_15;
+
+
+----------------------------------------------------------------
+
+
+architecture test of ch_03_15 is
+begin
+
+ -- code from book:
+
+ erroneous : process is
+ variable i, j : integer;
+ begin
+ i := loop_param; -- error!
+ for loop_param in 1 to 10 loop
+ loop_param := 5; -- error!
+ end loop;
+ j := loop_param; -- error!
+ end process erroneous;
+
+ -- end of code from book
+
+
+end architecture test;
diff --git a/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_04_ch_04_03.vhd b/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_04_ch_04_03.vhd
new file mode 100644
index 000000000..7cbf47b6b
--- /dev/null
+++ b/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_04_ch_04_03.vhd
@@ -0,0 +1,131 @@
+
+-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- VESTs is free software; you can redistribute it and/or modify it
+-- under the terms of the GNU General Public License as published by the
+-- Free Software Foundation; either version 2 of the License, or (at
+-- your option) any later version.
+
+-- VESTs is distributed in the hope that it will be useful, but WITHOUT
+-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+-- for more details.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: ch_04_ch_04_03.vhd,v 1.2 2001-10-26 16:29:37 paw Exp $
+-- $Revision: 1.2 $
+--
+-- ---------------------------------------------------------------------
+
+entity ch_04_03 is
+
+end entity ch_04_03;
+
+
+----------------------------------------------------------------
+
+
+architecture test of ch_04_03 is
+
+ subtype coeff_ram_address is integer range 0 to 63;
+
+ -- code from book:
+
+ type coeff_array is array (coeff_ram_address) of real;
+
+ -- end of code from book
+
+begin
+
+
+ process_04_1_c : process is
+
+ -- code from book:
+
+ type point is array (1 to 3) of real;
+ constant origin : point := (0.0, 0.0, 0.0);
+ variable view_point : point := (10.0, 20.0, 0.0);
+
+ -- end of code from book
+
+ begin
+ wait;
+ end process process_04_1_c;
+
+
+ process_04_1_d : process is
+
+ type point is array (1 to 3) of real;
+
+ -- code from book:
+
+ variable view_point : point := (1 => 10.0, 2 => 20.0, 3 => 0.0);
+
+ -- end of code from book
+
+ begin
+ wait;
+ end process process_04_1_d;
+
+
+ process_04_1_e : process is
+
+ -- code from book:
+
+ variable coeff : coeff_array := (0 => 1.6, 1 => 2.3, 2 => 1.6, 3 to 63 => 0.0);
+
+ -- end of code from book
+
+ begin
+ wait;
+ end process process_04_1_e;
+
+
+ process_04_1_f : process is
+
+ -- code from book:
+
+ variable coeff : coeff_array := (0 => 1.6, 1 => 2.3, 2 => 1.6, others => 0.0);
+
+ -- end of code from book
+
+ begin
+ wait;
+ end process process_04_1_f;
+
+
+ process_04_1_g : process is
+
+ -- code from book:
+
+ variable coeff : coeff_array := (0 | 2 => 1.6, 1 => 2.3, others => 0.0);
+
+ -- end of code from book
+
+ begin
+ wait;
+ end process process_04_1_g;
+
+
+ process_04_1_h : process is
+
+ -- code from book:
+
+ -- error: Associations in array aggregate must be all named or all positional
+ -- variable coeff : coeff_array := (1.6, 2.3, 2 => 1.6, others => 0.0); -- illegal
+
+ -- end of code from book
+
+ begin
+ wait;
+ end process process_04_1_h;
+
+
+end architecture test;
diff --git a/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_04_ch_04_09.vhd b/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_04_ch_04_09.vhd
new file mode 100644
index 000000000..661407f0b
--- /dev/null
+++ b/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_04_ch_04_09.vhd
@@ -0,0 +1,86 @@
+
+-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- VESTs is free software; you can redistribute it and/or modify it
+-- under the terms of the GNU General Public License as published by the
+-- Free Software Foundation; either version 2 of the License, or (at
+-- your option) any later version.
+
+-- VESTs is distributed in the hope that it will be useful, but WITHOUT
+-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+-- for more details.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: ch_04_ch_04_09.vhd,v 1.2 2001-10-26 16:29:37 paw Exp $
+-- $Revision: 1.2 $
+--
+-- ---------------------------------------------------------------------
+
+entity ch_04_09 is
+
+end entity ch_04_09;
+
+
+----------------------------------------------------------------
+
+
+architecture test of ch_04_09 is
+begin
+
+
+ process_04_3_c : process is
+
+ -- code from book:
+
+ subtype name is string(1 to 20);
+ type display_string is array (integer range 0 to 19) of character;
+
+ variable item_name : name;
+ variable display : display_string;
+
+ --
+
+ subtype big_endian_upper_halfword is bit_vector(0 to 15);
+ subtype little_endian_upper_halfword is bit_vector(31 downto 16);
+
+ variable big : big_endian_upper_halfword;
+ variable little : little_endian_upper_halfword;
+
+ -- end of code from book
+
+ begin
+
+ -- error: Incompatible types for assignment
+ -- display := item_name; -- ilegal
+
+ item_name := (others => 'A');
+
+ little := x"AAAA";
+
+ -- code from book:
+
+ display := display_string(item_name);
+
+ --
+
+ big := little;
+ little := big;
+
+ -- end of code from book
+
+ wait;
+ end process process_04_3_c;
+
+
+ ----------------
+
+
+end architecture test;
diff --git a/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_17_fg_17_12.vhd b/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_17_fg_17_12.vhd
new file mode 100644
index 000000000..f57c9ffe7
--- /dev/null
+++ b/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_17_fg_17_12.vhd
@@ -0,0 +1,88 @@
+
+-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- VESTs is free software; you can redistribute it and/or modify it
+-- under the terms of the GNU General Public License as published by the
+-- Free Software Foundation; either version 2 of the License, or (at
+-- your option) any later version.
+
+-- VESTs is distributed in the hope that it will be useful, but WITHOUT
+-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+-- for more details.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: ch_17_fg_17_12.vhd,v 1.2 2001-10-26 16:29:37 paw Exp $
+-- $Revision: 1.2 $
+--
+-- ---------------------------------------------------------------------
+
+package «element_type_simple_name»_ordered_collection_adt is
+
+ -- template: fill in the placeholders to specialize for a particular type
+
+ alias element_type is «element_type»;
+ alias key_type is «key_type»;
+ alias key_of is «key_function» [ element_type return key_type ];
+ alias "<" is «less_than_function» [ key_type, key_type return boolean ];
+
+ -- types provided by the package
+
+ type ordered_collection_object; -- private
+ type position_object; -- private
+
+ type ordered_collection is access ordered_collection_object;
+ type position is access position_object;
+
+ -- operations on ordered collections
+
+ function new_ordered_collection return ordered_collection;
+ -- returns an empty ordered collection of element_type values
+
+ procedure insert ( c : inout ordered_collection; e : in element_type );
+ -- inserts e into c in position determined by key_of(e)
+
+ procedure get_element ( variable p : in position; e : out element_type );
+ -- returns the element value at position p in its collection
+
+ procedure test_null_position ( variable p : in position; is_null : out boolean );
+ -- test whether p refers to no position in its collection
+
+ procedure search ( variable c : in ordered_collection; k : in key_type;
+ p : out position );
+ -- searches for an element with key k in c, and returns the position of
+ -- that element, or, if not found, a position for which test_null_position
+ -- returns true
+
+ procedure find_first ( variable c : in ordered_collection; p : out position );
+ -- returns the position of the first element of c
+
+ procedure advance ( p : inout position );
+ -- advances p to the next element in its collection,
+ -- or if there are no more, sets p so that test_null_position returns true
+
+ procedure delete ( p : inout position );
+ -- deletes the element at position p from its collection, and advances p
+
+ -- private types: pretend these are not visible
+
+ type ordered_collection_object is
+ record
+ element : element_type;
+ next_element, prev_element : ordered_collection;
+ end record ordered_collection_object;
+
+ type position_object is
+ record
+ the_collection : ordered_collection;
+ current_element : ordered_collection;
+ end record position_object;
+
+end package «element_type_simple_name»_ordered_collection_adt;
diff --git a/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_17_fg_17_14.vhd b/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_17_fg_17_14.vhd
new file mode 100644
index 000000000..ad47459be
--- /dev/null
+++ b/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_17_fg_17_14.vhd
@@ -0,0 +1,85 @@
+
+-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- VESTs is free software; you can redistribute it and/or modify it
+-- under the terms of the GNU General Public License as published by the
+-- Free Software Foundation; either version 2 of the License, or (at
+-- your option) any later version.
+
+-- VESTs is distributed in the hope that it will be useful, but WITHOUT
+-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+-- for more details.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: ch_17_fg_17_14.vhd,v 1.2 2001-10-26 16:29:37 paw Exp $
+-- $Revision: 1.2 $
+--
+-- ---------------------------------------------------------------------
+
+-- not in book
+
+entity test_bench is
+end entity test_bench;
+
+-- end not in book
+
+
+library ieee; use ieee.std_logic_1164.all;
+
+architecture initial_test of test_bench is
+
+ use work.stimulus_types.all;
+
+ -- . . . -- component and signal declarations
+
+ -- not in book
+ signal dut_signals : std_logic_vector(0 to stimulus_vector_length - 1);
+ -- end not in book
+
+begin
+
+ -- . . . -- instantiate design under test
+
+ stimulus_generation : process is
+
+ use work.stimulus_element_ordered_collection_adt.all;
+
+ variable stimulus_list : ordered_collection := new_ordered_collection;
+ variable next_stimulus_position : position;
+ variable next_stimulus : stimulus_element;
+ variable position_is_null : boolean;
+
+ begin
+ insert(stimulus_list, stimulus_element'(0 ns, "0XXXXXXXXX"));
+ insert(stimulus_list, stimulus_element'(200 ns, "0000110110"));
+ insert(stimulus_list, stimulus_element'(300 ns, "10001ZZZZZ"));
+ insert(stimulus_list, stimulus_element'(50 ns, "1XXXXXXXXX"));
+ insert(stimulus_list, stimulus_element'(60 ns, "1ZZZZZZZZZ"));
+ -- . . .
+ -- not in book
+ insert(stimulus_list, stimulus_element'(100 ns, "----------"));
+ search(stimulus_list, 100 ns, next_stimulus_position);
+ delete(next_stimulus_position);
+ get_element(next_stimulus_position, next_stimulus);
+ -- end not in book
+ find_first(stimulus_list, next_stimulus_position);
+ loop
+ test_null_position(next_stimulus_position, position_is_null);
+ exit when position_is_null;
+ get_element(next_stimulus_position, next_stimulus);
+ wait for next_stimulus.application_time - now;
+ dut_signals <= next_stimulus.pattern;
+ advance(next_stimulus_position);
+ end loop;
+ wait;
+ end process stimulus_generation;
+
+end architecture initial_test;
diff --git a/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_17_fg_17_16.vhd b/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_17_fg_17_16.vhd
new file mode 100644
index 000000000..0f4e934ba
--- /dev/null
+++ b/testsuite/vests/vhdl-93/ashenden/non_compliant/ch_17_fg_17_16.vhd
@@ -0,0 +1,106 @@
+
+-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc
+
+-- This file is part of VESTs (Vhdl tESTs).
+
+-- VESTs is free software; you can redistribute it and/or modify it
+-- under the terms of the GNU General Public License as published by the
+-- Free Software Foundation; either version 2 of the License, or (at
+-- your option) any later version.
+
+-- VESTs is distributed in the hope that it will be useful, but WITHOUT
+-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+-- for more details.
+
+-- You should have received a copy of the GNU General Public License
+-- along with VESTs; if not, write to the Free Software Foundation,
+-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+-- ---------------------------------------------------------------------
+--
+-- $Id: ch_17_fg_17_16.vhd,v 1.2 2001-10-26 16:29:37 paw Exp $
+-- $Revision: 1.2 $
+--
+-- ---------------------------------------------------------------------
+
+package body «element_type_simple_name»_ordered_collection_adt is
+
+ function new_ordered_collection return ordered_collection is
+ variable result : ordered_collection := new ordered_collection_object;
+ begin
+ result.next_element := result;
+ result.prev_element := result;
+ return result;
+ end function new_ordered_collection;
+
+ procedure insert ( c : inout ordered_collection; e : in element_type ) is
+ variable current_element : ordered_collection := c.next_element;
+ variable new_element : ordered_collection;
+ begin
+ while current_element /= c
+ and key_of(current_element.element) < key_of(e) loop
+ current_element := current_element.next_element;
+ end loop;
+ -- insert new element before current_element
+ new_element := new ordered_collection_object'(
+ element => e,
+ next_element => current_element,
+ prev_element => current_element.prev_element );
+ new_element.next_element.prev_element := new_element;
+ new_element.prev_element.next_element := new_element;
+ end procedure insert;
+
+ procedure get_element ( variable p : in position; e : out element_type ) is
+ begin
+ e := p.current_element.element;
+ end procedure get_element;
+
+ procedure test_null_position ( variable p : in position; is_null : out boolean ) is
+ begin
+ is_null := p.current_element = p.the_collection;
+ end procedure test_null_position;
+
+ procedure search ( variable c : in ordered_collection; k : in key_type;
+ p : out position ) is
+ variable current_element : ordered_collection := c.next_element;
+ begin
+ while current_element /= c
+ and key_of(current_element.element) < k loop
+ current_element := current_element.next_element;
+ end loop;
+ if current_element = c or k < key_of(current_element.element) then
+ p := new position_object'(c, c); -- null position
+ else
+ p := new position_object'(c, current_element);
+ end if;
+ end procedure search;
+
+ procedure find_first ( variable c : in ordered_collection; p : out position ) is
+ begin
+ p := new position_object'(c, c.next_element);
+ end procedure find_first;
+
+ procedure advance ( p : inout position ) is
+ variable is_null : boolean;
+ begin
+ test_null_position(p, is_null);
+ if not is_null then
+ p.current_element := p.current_element.next_element;
+ end if;
+ end procedure advance;
+
+ procedure delete ( p : inout position ) is
+ variable is_null : boolean;
+ begin
+ test_null_position(p, is_null);
+ if not is_null then
+ p.current_element.next_element.prev_element
+ := p.current_element.prev_element;
+ p.current_element.prev_element.next_element
+ := p.current_element.next_element;
+ p.current_element := p.current_element.next_element;
+ end if;
+ end procedure delete;
+
+end package body «element_type_simple_name»_ordered_collection_adt;
diff --git a/testsuite/vests/vhdl-93/ashenden/non_compliant/non_compliant.exp b/testsuite/vests/vhdl-93/ashenden/non_compliant/non_compliant.exp
new file mode 100644
index 000000000..28d164342
--- /dev/null
+++ b/testsuite/vests/vhdl-93/ashenden/non_compliant/non_compliant.exp
@@ -0,0 +1,50 @@
+
+# Copyright (C) 2001 Clifton Labs, Inc
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+# Please email any bugs, comments, and/or additions to this file to:
+# vests@cliftonlabs.com
+
+# Authors: Philip A. Wilsey philip.wilsey@ieee.org
+# Dale E. Martin dmartin@cliftonlabs.com
+
+# $Author: paw $
+# $Revision: 1.1 $
+
+# ------------------------------------------------------------------------
+#
+# $Id: non_compliant.exp,v 1.1 2001-10-19 23:28:54 paw Exp $
+#
+# ------------------------------------------------------------------------
+
+setup_test_group "Ashenden:Non-compliant Cases" "1076-1993"
+
+run_non_compliant_test ch_02_ch_02_01.vhd
+run_non_compliant_test ch_03_ch_03_09.vhd
+run_non_compliant_test ch_03_ch_03_15.vhd
+run_non_compliant_test ch_04_ch_04_03.vhd
+run_non_compliant_test ch_04_ch_04_09.vhd
+run_non_compliant_test ch_17_fg_17_12.vhd
+run_non_compliant_test ch_17_fg_17_14.vhd
+run_non_compliant_test ch_17_fg_17_16.vhd
+
+end_test_group
+
+# $Log: non_compliant.exp,v $
+# Revision 1.1 2001-10-19 23:28:54 paw
+# Adding dejagnu scripts to run ashenden's test cases.
+#
+