diff options
Diffstat (limited to 'testsuite/synth')
-rw-r--r-- | testsuite/synth/issue2043/ent.vhdl | 34 | ||||
-rw-r--r-- | testsuite/synth/issue2043/ent1.vhdl | 32 | ||||
-rw-r--r-- | testsuite/synth/issue2043/tb_ent1.vhdl | 39 | ||||
-rwxr-xr-x | testsuite/synth/issue2043/testsuite.sh | 12 |
4 files changed, 117 insertions, 0 deletions
diff --git a/testsuite/synth/issue2043/ent.vhdl b/testsuite/synth/issue2043/ent.vhdl new file mode 100644 index 000000000..5e8727a60 --- /dev/null +++ b/testsuite/synth/issue2043/ent.vhdl @@ -0,0 +1,34 @@ +library IEEE; +use IEEE.std_logic_1164.ALL; +use IEEE.numeric_std.all; + +entity ent is + generic ( + g_NumberOfChannels : natural := 4; + g_BitsPerChannel : natural := 16 + ); + port ( + CLK : in std_logic; + RST : in std_logic; + DATA : out std_logic_vector(g_NumberOfChannels*g_BitsPerChannel-1 downto 0) + ); +end entity; + +architecture arch of ent is + + signal do_out : STD_LOGIC_VECTOR(15 DOWNTO 0); + +begin + + process(RST, CLK) + variable cnt: natural range 0 to g_NumberOfChannels-1; + begin + if RST then + cnt := 0; + elsif rising_edge(CLK) then + DATA((cnt+1)*g_BitsPerChannel-1 downto cnt*g_BitsPerChannel) <= do_out(do_out'left downto 1+do_out'left-g_BitsPerChannel); + cnt := cnt + 1 when cnt<g_NumberOfChannels-1 else 0; + end if; + end process; + +end architecture; diff --git a/testsuite/synth/issue2043/ent1.vhdl b/testsuite/synth/issue2043/ent1.vhdl new file mode 100644 index 000000000..51f396ae6 --- /dev/null +++ b/testsuite/synth/issue2043/ent1.vhdl @@ -0,0 +1,32 @@ +library IEEE; +use IEEE.std_logic_1164.ALL; +use IEEE.numeric_std.all; + +entity ent1 is + generic ( + g_NumberOfChannels : natural := 4; + g_BitsPerChannel : natural := 16 + ); + port ( + CLK : in std_logic; + RST : in std_logic; + inp : in std_logic_vector(g_BitsPerChannel-1 downto 0); + DATA : out std_logic_vector(g_NumberOfChannels*g_BitsPerChannel-1 downto 0) + ); +end entity; + +architecture arch of ent1 is +begin + + process(RST, CLK) + variable cnt: natural range 0 to g_NumberOfChannels-1; + begin + if RST then + cnt := 0; + elsif rising_edge(CLK) then + DATA((cnt+1)*g_BitsPerChannel-1 downto cnt*g_BitsPerChannel) <= inp; + cnt := cnt + 1 when cnt<g_NumberOfChannels-1 else 0; + end if; + end process; + +end architecture; diff --git a/testsuite/synth/issue2043/tb_ent1.vhdl b/testsuite/synth/issue2043/tb_ent1.vhdl new file mode 100644 index 000000000..80174e4dc --- /dev/null +++ b/testsuite/synth/issue2043/tb_ent1.vhdl @@ -0,0 +1,39 @@ +entity tb_ent1 is +end tb_ent1; + +library ieee; +use ieee.std_logic_1164.all; + +architecture behav of tb_ent1 is + signal clk, rst : std_logic; + signal inp : std_logic_vector(15 downto 0); + signal data : std_logic_vector(63 downto 0); +begin + dut: entity work.ent1 + port map (clk, rst, inp, data); + + process + procedure pulse is + begin + clk <= '0'; + wait for 1 ns; + clk <= '1'; + wait for 1 ns; + end pulse; + begin + rst <= '1'; + pulse; + + rst <= '0'; + inp <= x"a001"; + pulse; + inp <= x"b002"; + pulse; + inp <= x"c003"; + pulse; + inp <= x"d004"; + pulse; + assert data = x"d004c003b002a001" severity failure; + wait; + end process; +end behav; diff --git a/testsuite/synth/issue2043/testsuite.sh b/testsuite/synth/issue2043/testsuite.sh new file mode 100755 index 000000000..47236f448 --- /dev/null +++ b/testsuite/synth/issue2043/testsuite.sh @@ -0,0 +1,12 @@ +#! /bin/sh + +. ../../testenv.sh + +GHDL_STD_FLAGS=--std=08 +GHDL_SYNTH_FLAGS=--latches + +synth_tb ent1 +synth_only ent + +clean +echo "Test successful" |