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Diffstat (limited to 'testsuite/synth/mem02/ram9.vhdl')
-rw-r--r-- | testsuite/synth/mem02/ram9.vhdl | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/testsuite/synth/mem02/ram9.vhdl b/testsuite/synth/mem02/ram9.vhdl new file mode 100644 index 000000000..71b30f6a3 --- /dev/null +++ b/testsuite/synth/mem02/ram9.vhdl @@ -0,0 +1,23 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +entity ram8 is + port (val : out std_logic_vector (7 downto 0); + addr : std_logic_vector (3 downto 0); + clk : std_logic); +end ram8; + +architecture behav of ram8 is +begin + process (clk) + type mem_t is array (15 downto 0) of std_logic_vector(7 downto 0); + variable mem : mem_t; + variable ra : natural; + begin + if rising_edge (clk) then + ra := to_integer(unsigned (addr)); + val <= mem(ra); + end if; + end process; +end behav; |