1 files changed, 27 insertions, 0 deletions
diff --git a/testsuite/synth/issue963/ent.vhdl b/testsuite/synth/issue963/ent.vhdl
new file mode 100644
index 000000000..2481e43a9
--- /dev/null
+++ b/testsuite/synth/issue963/ent.vhdl
@@ -0,0 +1,27 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity ent is
+    port (
+        clk : in std_logic;
+        set : in std_logic;
+        reset : in std_logic;
+        q : out std_logic
+    );
+end;
+
+architecture a of ent is
+    signal s : std_logic;
+begin
+    process(clk, set, reset)
+    begin
+        if set = '1' then
+            s <= '1';
+        elsif reset = '1' then
+            s <= '0';
+        elsif rising_edge(clk) then
+            s <= not s;
+        end if;
+    end process;
+    q <= s;
+end;