diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/synth/netlists-builders.adb | 38 | ||||
| -rw-r--r-- | src/synth/netlists-builders.ads | 3 | ||||
| -rw-r--r-- | src/synth/netlists-disp_vhdl.adb | 22 | ||||
| -rw-r--r-- | src/synth/netlists-gates.ads | 7 |
4 files changed, 0 insertions, 70 deletions
diff --git a/src/synth/netlists-builders.adb b/src/synth/netlists-builders.adb index 70a8b37a4..59994c20a 100644 --- a/src/synth/netlists-builders.adb +++ b/src/synth/netlists-builders.adb @@ -211,25 +211,6 @@ package body Netlists.Builders is Typ => Param_Uns32))); end Create_Dyn_Extract_Module; - procedure Create_Insert_Module (Ctxt : Context_Acc) - is - Outputs : Port_Desc_Array (0 .. 0); - Inputs : Port_Desc_Array (0 .. 1); - Res : Module; - begin - Res := New_User_Module - (Ctxt.Design, New_Sname_Artificial (Get_Identifier ("insert")), - Id_Insert, 2, 1, 1); - Ctxt.M_Insert := Res; - Outputs := (0 => Create_Output ("o")); - Inputs := (0 => Create_Input ("i"), - 1 => Create_Input ("v")); - Set_Port_Desc (Res, Inputs, Outputs); - Set_Param_Desc - (Res, (0 => (New_Sname_Artificial (Get_Identifier ("index")), - Typ => Param_Uns32))); - end Create_Insert_Module; - procedure Create_Dyn_Insert_Module (Ctxt : Context_Acc) is Outputs : Port_Desc_Array (0 .. 0); @@ -449,7 +430,6 @@ package body Netlists.Builders is Create_Extract_Module (Res); Create_Dyn_Extract_Module (Res); - Create_Insert_Module (Res); Create_Dyn_Insert_Module (Res); Create_Monadic_Module (Design, Res.M_Truncate (Id_Utrunc), @@ -805,24 +785,6 @@ package body Netlists.Builders is return O; end Build_Extend; - function Build_Insert - (Ctxt : Context_Acc; I : Net; V : Net; Off : Width) return Net - is - Wd : constant Width := Get_Width (I); - pragma Assert (Off < Wd); - pragma Assert (Get_Width (V) + Off <= Wd); - Inst : Instance; - O : Net; - begin - Inst := New_Internal_Instance (Ctxt, Ctxt.M_Insert); - Connect (Get_Input (Inst, 0), I); - Connect (Get_Input (Inst, 1), V); - Set_Param_Uns32 (Inst, 0, Off); - O := Get_Output (Inst, 0); - Set_Width (O, Wd); - return O; - end Build_Insert; - function Build_Dyn_Insert (Ctxt : Context_Acc; I : Net; V : Net; P : Net; Step : Uns32; Off : Int32) diff --git a/src/synth/netlists-builders.ads b/src/synth/netlists-builders.ads index 82f05962d..5ef01e6e9 100644 --- a/src/synth/netlists-builders.ads +++ b/src/synth/netlists-builders.ads @@ -109,8 +109,6 @@ package Netlists.Builders is (Ctxt : Context_Acc; I : Net; P : Net; Step : Uns32; Off : Int32; W : Width) return Net; - function Build_Insert - (Ctxt : Context_Acc; I : Net; V : Net; Off : Width) return Net; function Build_Dyn_Insert (Ctxt : Context_Acc; I : Net; V : Net; P : Net; Step : Uns32; Off : Int32) return Net; @@ -176,7 +174,6 @@ private M_Extend : Module_Arr (Extend_Module_Id); M_Reduce : Module_Arr (Reduce_Module_Id); M_Extract : Module; - M_Insert : Module; M_Dyn_Extract : Module; M_Dyn_Insert : Module; M_Assert : Module; diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb index 0bbf480db..4d0780d3c 100644 --- a/src/synth/netlists-disp_vhdl.adb +++ b/src/synth/netlists-disp_vhdl.adb @@ -582,28 +582,6 @@ package body Netlists.Disp_Vhdl is end if; Put_Line (");"); end; - when Id_Insert => - declare - Iw : constant Width := Get_Width (Get_Input_Net (Inst, 1)); - Ow : constant Width := Get_Width (Get_Output (Inst, 0)); - Off : constant Uns32 := Get_Param_Uns32 (Inst, 0); - begin - Disp_Template (" \o0 <= ", Inst); - if Off + Iw + 1 = Ow then - Disp_Template ("\i0 (\n0) & ", Inst, (0 => Ow - 1)); - elsif Off + Iw < Ow then - Disp_Template ("\i0 (\n0 downto \n1) & ", Inst, - (0 => Ow - 1, 1 => Off + Iw)); - end if; - Disp_Template ("\i1", Inst); - if Off > 1 then - Disp_Template (" & \i0 (\n0 downto 0)", Inst, - (0 => Off - 1)); - elsif Off = 1 then - Disp_Template (" & \i0 (0)", Inst); - end if; - Disp_Template (";" & NL, Inst); - end; when Id_Dyn_Insert => declare -- I0: Input, I1: Value, I2: position diff --git a/src/synth/netlists-gates.ads b/src/synth/netlists-gates.ads index da72811e0..57f2fd500 100644 --- a/src/synth/netlists-gates.ads +++ b/src/synth/netlists-gates.ads @@ -120,13 +120,6 @@ package Netlists.Gates is -- OUT := IN0[IN1*STEP+OFF+WD-1:IN1*STEP+OFF] Id_Dyn_Extract : constant Module_Id := 51; - -- This gate has two inputs I, V and one parameter POS. - -- It replaces bits POS + width(V) - 1 .. POS of I by V, ie: - -- T := I; - -- T [POS+width(V)-1:POS] := V - -- OUT := T. - Id_Insert : constant Module_Id := 52; - -- Like Insert but for dynamic values. -- T := IN0 -- T [IN2*STEP+OFF+WD-1:IN2*STEP+OFF] := IN1 |