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-rw-r--r--src/synth/netlists-builders.adb7
-rw-r--r--src/synth/synth-expr.adb12
2 files changed, 19 insertions, 0 deletions
diff --git a/src/synth/netlists-builders.adb b/src/synth/netlists-builders.adb
index 5fb5140fa..46b7e015c 100644
--- a/src/synth/netlists-builders.adb
+++ b/src/synth/netlists-builders.adb
@@ -267,6 +267,13 @@ package body Netlists.Builders is
Create_Dyadic_Module (Design, Res.M_Dyadic (Id_Or), Name_Or, Id_Or);
Create_Dyadic_Module (Design, Res.M_Dyadic (Id_Xor), Name_Xor, Id_Xor);
+ Create_Dyadic_Module
+ (Design, Res.M_Dyadic (Id_Nand), Name_Nand, Id_Nand);
+ Create_Dyadic_Module
+ (Design, Res.M_Dyadic (Id_Nor), Name_Nor, Id_Nor);
+ Create_Dyadic_Module
+ (Design, Res.M_Dyadic (Id_Xnor), Name_Xnor, Id_Xnor);
+
Create_Dyadic_Module (Design, Res.M_Dyadic (Id_Add),
Get_Identifier ("add"), Id_Add);
Create_Dyadic_Module (Design, Res.M_Dyadic (Id_Sub),
diff --git a/src/synth/synth-expr.adb b/src/synth/synth-expr.adb
index b44024367..1180386c6 100644
--- a/src/synth/synth-expr.adb
+++ b/src/synth/synth-expr.adb
@@ -359,6 +359,7 @@ package body Synth.Expr is
case Def is
when Iir_Predefined_Error =>
return null;
+
when Iir_Predefined_Bit_And
| Iir_Predefined_Boolean_And
| Iir_Predefined_Ieee_1164_Scalar_And =>
@@ -369,6 +370,17 @@ package body Synth.Expr is
when Iir_Predefined_Bit_Or
| Iir_Predefined_Ieee_1164_Scalar_Or =>
return Synth_Bit_Dyadic (Id_Or);
+
+ when Iir_Predefined_Bit_Nor
+ | Iir_Predefined_Ieee_1164_Scalar_Nor =>
+ return Synth_Bit_Dyadic (Id_Nor);
+ when Iir_Predefined_Bit_Nand
+ | Iir_Predefined_Ieee_1164_Scalar_Nand =>
+ return Synth_Bit_Dyadic (Id_Nand);
+ when Iir_Predefined_Bit_Xnor
+ | Iir_Predefined_Ieee_1164_Scalar_Xnor =>
+ return Synth_Bit_Dyadic (Id_Xnor);
+
when Iir_Predefined_Enum_Equality =>
if Get_Width (Left) = 1 then
if Is_Const (Left) then