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-rw-r--r--src/vhdl/translate/trans-chap7.adb4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/vhdl/translate/trans-chap7.adb b/src/vhdl/translate/trans-chap7.adb
index 478c76565..c361f0905 100644
--- a/src/vhdl/translate/trans-chap7.adb
+++ b/src/vhdl/translate/trans-chap7.adb
@@ -2120,10 +2120,10 @@ package body Trans.Chap7 is
when Iir_Predefined_Vector_Minimum =>
return Translate_Predefined_Vector_Min_Max
- (True, Left, Res_Type);
+ (True, Left, Get_Type (Expr));
when Iir_Predefined_Vector_Maximum =>
return Translate_Predefined_Vector_Min_Max
- (False, Left, Res_Type);
+ (False, Left, Get_Type (Expr));
when Iir_Predefined_Bit_Rising_Edge
| Iir_Predefined_Boolean_Rising_Edge =>