diff options
Diffstat (limited to 'src/vhdl/simulate/simul-simulation-main.adb')
| -rw-r--r-- | src/vhdl/simulate/simul-simulation-main.adb | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/src/vhdl/simulate/simul-simulation-main.adb b/src/vhdl/simulate/simul-simulation-main.adb index 5af8acb55..d6c6ba0ff 100644 --- a/src/vhdl/simulate/simul-simulation-main.adb +++ b/src/vhdl/simulate/simul-simulation-main.adb @@ -477,12 +477,18 @@ package body Simul.Simulation.Main is S_Num := Get_State_Label (S); pragma Assert (S_Num = Get_PSL_Nbr_States (E.Stmt) - 1); case Get_Kind (E.Stmt) is - when Iir_Kind_Psl_Assert_Statement => + when Iir_Kind_Psl_Assume_Directive => if Nvec (S_Num) then Execute_Failed_Assertion (E.Instance, "psl assertion", E.Stmt, "assertion violation", 2); end if; + when Iir_Kind_Psl_Assume_Directive => + if Nvec (S_Num) then + Execute_Failed_Assertion + (E.Instance, "psl assumption", E.Stmt, + "assumption violation", 2); + end if; when Iir_Kind_Psl_Cover_Directive => if Nvec (S_Num) then if Get_Report_Expression (E.Stmt) /= Null_Iir then @@ -563,7 +569,8 @@ package body Simul.Simulation.Main is (E.Instance, Get_PSL_Clock_Sensitivity (E.Stmt)); case Get_Kind (E.Stmt) is - when Iir_Kind_Psl_Assert_Statement => + when Iir_Kind_Psl_Assert_Directive + | Iir_Kind_Psl_Assume_Directive => if Get_PSL_EOS_Flag (E.Stmt) then Grt.Processes.Ghdl_Finalize_Register (To_Instance_Acc (E'Address), |