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-rw-r--r--src/synth/synth-disp_vhdl.adb15
1 files changed, 12 insertions, 3 deletions
diff --git a/src/synth/synth-disp_vhdl.adb b/src/synth/synth-disp_vhdl.adb
index 07e9fc94e..e7d61b11c 100644
--- a/src/synth/synth-disp_vhdl.adb
+++ b/src/synth/synth-disp_vhdl.adb
@@ -77,9 +77,18 @@ package body Synth.Disp_Vhdl is
end if;
when Iir_Kind_Integer_Type_Definition =>
-- FIXME: signed or unsigned ?
- Put (" wrap_" & Pfx & " <= std_logic_vector(to_unsigned(");
- Put (Pfx & "," & Width'Image (Desc.W) & "));");
- New_Line;
+ Put (" wrap_" & Pfx & " <= ");
+ if Desc.W > 1 then
+ Put ("std_logic_vector(");
+ end if;
+ Put ("to_unsigned(");
+ Put (Pfx & "," & Width'Image (Desc.W) & ")");
+ if Desc.W > 1 then
+ Put (")");
+ elsif Desc.W = 1 then
+ Put ("(0)");
+ end if;
+ Put_Line (";");
Idx := Idx + 1;
when Iir_Kind_Array_Type_Definition =>
if Btype = Vhdl.Ieee.Std_Logic_1164.Std_Logic_Vector_Type then