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-rw-r--r--pyGHDL/dom/Type.py31
1 files changed, 28 insertions, 3 deletions
diff --git a/pyGHDL/dom/Type.py b/pyGHDL/dom/Type.py
index c276387c7..69cf97af0 100644
--- a/pyGHDL/dom/Type.py
+++ b/pyGHDL/dom/Type.py
@@ -32,8 +32,13 @@
# ============================================================================
from pydecor import export
+from pyGHDL.dom.Range import Range
from pyVHDLModel.VHDLModel import (
IntegerType as VHDLModel_IntegerType,
+ EnumeratedType as VHDLModel_EnumeratedType,
+ ArrayType as VHDLModel_ArrayType,
+ RecordType as VHDLModel_RecordType,
+ AccessType as VHDLModel_AccessType,
SubType as VHDLModel_SubType,
Expression,
)
@@ -41,10 +46,30 @@ from pyVHDLModel.VHDLModel import (
@export
class IntegerType(VHDLModel_IntegerType):
- def __init__(self, typeName: str, leftBound: Expression, rightBound: Expression):
+ def __init__(self, typeName: str, range: Range):
super().__init__(typeName)
- self._leftBound = leftBound
- self._rightBound = rightBound
+ self._leftBound = range.LeftBound
+ self._rightBound = range.RightBound
+
+
+@export
+class EnumeratedType(VHDLModel_EnumeratedType):
+ pass
+
+
+@export
+class ArrayType(VHDLModel_ArrayType):
+ pass
+
+
+@export
+class RecordType(VHDLModel_RecordType):
+ pass
+
+
+@export
+class AccessType(VHDLModel_AccessType):
+ pass
@export