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Diffstat (limited to 'doc/0_Intro/WhatIsVHDL.rst')
| -rw-r--r-- | doc/0_Intro/WhatIsVHDL.rst | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/doc/0_Intro/WhatIsVHDL.rst b/doc/0_Intro/WhatIsVHDL.rst index fbf0dbd73..b70b3a723 100644 --- a/doc/0_Intro/WhatIsVHDL.rst +++ b/doc/0_Intro/WhatIsVHDL.rst @@ -28,6 +28,8 @@ Like a program written in another hardware description language, a `VHDL` program can be transformed with a :dfn:`synthesis tool` into a netlist, that is, a detailed gate-level implementation. ---- +---------------- -@TODO: [1138: very very briefly explain that there are four major verions: 87, 93, 02 and 08]
\ No newline at end of file +.. TODO: topic + + @1138 very very briefly explain that there are four major verions: 87, 93, 02 and 08
\ No newline at end of file |