diff options
| -rw-r--r-- | testsuite/synth/blackbox01/blackbox1_adder_bb.vhdl | 14 | ||||
| -rwxr-xr-x | testsuite/synth/blackbox01/testsuite.sh | 9 |
2 files changed, 23 insertions, 0 deletions
diff --git a/testsuite/synth/blackbox01/blackbox1_adder_bb.vhdl b/testsuite/synth/blackbox01/blackbox1_adder_bb.vhdl new file mode 100644 index 000000000..47227eab3 --- /dev/null +++ b/testsuite/synth/blackbox01/blackbox1_adder_bb.vhdl @@ -0,0 +1,14 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +entity blackbox1_adder is + port (a, b : in std_logic_vector(7 downto 0); + r : out std_logic_vector(7 downto 0)); +end blackbox1_adder; + +architecture behav of blackbox1_adder is + attribute syn_black_box : boolean; + attribute syn_black_box of behav : architecture is true; +begin +end behav; diff --git a/testsuite/synth/blackbox01/testsuite.sh b/testsuite/synth/blackbox01/testsuite.sh index 9e5802045..63c1e6210 100755 --- a/testsuite/synth/blackbox01/testsuite.sh +++ b/testsuite/synth/blackbox01/testsuite.sh @@ -2,13 +2,22 @@ . ../../testenv.sh +# The testbench analyze blackbox1_adder.vhdl blackbox1.vhdl tb_blackbox1.vhdl elab_simulate tb_blackbox1 clean +# Synthesize using a not bounded component synth blackbox1.vhdl -e > syn_blackbox1.vhdl analyze blackbox1_adder.vhdl syn_blackbox1.vhdl tb_blackbox1.vhdl elab_simulate tb_blackbox1 clean +# Synthesize using entity + syn_black_box attribute +synth blackbox1_adder_bb.vhdl blackbox1.vhdl -e > syn_blackbox1.vhdl +analyze blackbox1_adder.vhdl syn_blackbox1.vhdl tb_blackbox1.vhdl +elab_simulate tb_blackbox1 +clean + + echo "Test successful" |