diff options
| -rw-r--r-- | src/synth/ghdlsynth_gates.h | 47 | ||||
| -rw-r--r-- | src/synth/netlists-builders.adb | 5 | ||||
| -rw-r--r-- | src/synth/netlists-disp_vhdl.adb | 6 | ||||
| -rw-r--r-- | src/synth/synth-expr.adb | 17 | ||||
| -rw-r--r-- | src/vhdl/vhdl-ieee-numeric.adb | 60 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 8 |
6 files changed, 118 insertions, 25 deletions
diff --git a/src/synth/ghdlsynth_gates.h b/src/synth/ghdlsynth_gates.h index b923652aa..ed5fd5a48 100644 --- a/src/synth/ghdlsynth_gates.h +++ b/src/synth/ghdlsynth_gates.h @@ -40,27 +40,28 @@ enum Module_Id { Id_Signal = 35, Id_Isignal = 36, Id_Output = 37, - Id_Dff = 38, - Id_Adff = 39, - Id_Idff = 40, - Id_Iadff = 41, - Id_Utrunc = 42, - Id_Strunc = 43, - Id_Uextend = 44, - Id_Sextend = 45, - Id_Extract = 46, - Id_Dyn_Extract = 47, - Id_Insert = 48, - Id_Dyn_Insert = 49, - Id_Edge = 50, - Id_Assert = 51, - Id_Assume = 52, - Id_Const_UB32 = 56, - Id_Const_SB32 = 57, - Id_Const_UB64 = 58, - Id_Const_SB64 = 59, - Id_Const_UB128 = 60, - Id_Const_SB128 = 61, - Id_Const_UL32 = 62, - Id_Const_SL32 = 63, + Id_Port = 38, + Id_Dff = 40, + Id_Adff = 41, + Id_Idff = 42, + Id_Iadff = 43, + Id_Utrunc = 46, + Id_Strunc = 47, + Id_Uextend = 48, + Id_Sextend = 49, + Id_Extract = 50, + Id_Dyn_Extract = 51, + Id_Insert = 52, + Id_Dyn_Insert = 53, + Id_Edge = 55, + Id_Assert = 56, + Id_Assume = 57, + Id_Const_UB32 = 64, + Id_Const_SB32 = 65, + Id_Const_UB64 = 66, + Id_Const_SB64 = 67, + Id_Const_UB128 = 68, + Id_Const_SB128 = 69, + Id_Const_UL32 = 70, + Id_Const_SL32 = 71, }; diff --git a/src/synth/netlists-builders.adb b/src/synth/netlists-builders.adb index 27364f109..78ed38a41 100644 --- a/src/synth/netlists-builders.adb +++ b/src/synth/netlists-builders.adb @@ -401,6 +401,11 @@ package body Netlists.Builders is Create_Compare_Module (Design, Res.M_Compare (Id_Ule), Get_Identifier ("ule"), Id_Ule); + Create_Compare_Module (Design, Res.M_Compare (Id_Ugt), + Get_Identifier ("ugt"), Id_Ugt); + Create_Compare_Module (Design, Res.M_Compare (Id_Uge), + Get_Identifier ("uge"), Id_Uge); + Create_Concat_Modules (Res); Create_Const_Modules (Res); diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb index f12dd7811..139b2c0d0 100644 --- a/src/synth/netlists-disp_vhdl.adb +++ b/src/synth/netlists-disp_vhdl.adb @@ -598,6 +598,12 @@ package body Netlists.Disp_Vhdl is when Id_Ule => Disp_Template (" \o0 <= '1' when \ui0 <= \ui1 else '0';" & NL, Inst); + when Id_Ugt => + Disp_Template (" \o0 <= '1' when \ui0 > \ui1 else '0';" & NL, + Inst); + when Id_Uge => + Disp_Template (" \o0 <= '1' when \ui0 >= \ui1 else '0';" & NL, + Inst); when Id_Eq => Disp_Template (" \o0 <= '1' when \i0 = \i1 else '0';" & NL, Inst); when Id_Ne => diff --git a/src/synth/synth-expr.adb b/src/synth/synth-expr.adb index d978c5676..c6e77effd 100644 --- a/src/synth/synth-expr.adb +++ b/src/synth/synth-expr.adb @@ -773,12 +773,25 @@ package body Synth.Expr is return Create_Value_Discrete (0); end if; return Synth_Compare_Uns_Nat (Id_Ult); - when Iir_Predefined_Ieee_Std_Logic_Unsigned_Lt_Slv_Slv => + when Iir_Predefined_Ieee_Numeric_Std_Lt_Uns_Uns + | Iir_Predefined_Ieee_Std_Logic_Unsigned_Lt_Slv_Slv => -- "<" (Unsigned, Unsigned) [resize] return Synth_Compare_Uns_Uns (Id_Ult); - when Iir_Predefined_Ieee_Std_Logic_Unsigned_Le_Slv_Slv => + when Iir_Predefined_Ieee_Numeric_Std_Le_Uns_Uns + | Iir_Predefined_Ieee_Std_Logic_Unsigned_Le_Slv_Slv => -- "<=" (Unsigned, Unsigned) [resize] return Synth_Compare_Uns_Uns (Id_Ule); + when Iir_Predefined_Ieee_Numeric_Std_Gt_Uns_Nat => + -- ">" (Unsigned, Natural) + return Synth_Compare_Uns_Nat (Id_Ugt); + when Iir_Predefined_Ieee_Numeric_Std_Gt_Uns_Uns + | Iir_Predefined_Ieee_Std_Logic_Unsigned_Gt_Slv_Slv => + -- ">" (Unsigned, Unsigned) [resize] + return Synth_Compare_Uns_Uns (Id_Ugt); + when Iir_Predefined_Ieee_Numeric_Std_Ge_Uns_Uns + | Iir_Predefined_Ieee_Std_Logic_Unsigned_Ge_Slv_Slv => + -- ">=" (Unsigned, Unsigned) [resize] + return Synth_Compare_Uns_Uns (Id_Uge); when Iir_Predefined_Array_Element_Concat => declare L : constant Net := Get_Net (Left, Ltype); diff --git a/src/vhdl/vhdl-ieee-numeric.adb b/src/vhdl/vhdl-ieee-numeric.adb index 24958e08a..9f57e7787 100644 --- a/src/vhdl/vhdl-ieee-numeric.adb +++ b/src/vhdl/vhdl-ieee-numeric.adb @@ -127,6 +127,60 @@ package body Vhdl.Ieee.Numeric is (others => (others => Iir_Predefined_None))); + Le_Patterns : constant Binary_Pattern_Type := + (Pkg_Std => + (Type_Unsigned => + (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Le_Uns_Uns, + Arg_Vect_Scal => Iir_Predefined_Ieee_Numeric_Std_Le_Uns_Nat, + Arg_Scal_Vect => Iir_Predefined_Ieee_Numeric_Std_Le_Nat_Uns, + Arg_Vect_Log => Iir_Predefined_None, + Arg_Log_Vect => Iir_Predefined_None), + Type_Signed => + (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Le_Sgn_Sgn, + Arg_Vect_Scal => Iir_Predefined_Ieee_Numeric_Std_Le_Sgn_Int, + Arg_Scal_Vect => Iir_Predefined_Ieee_Numeric_Std_Le_Int_Sgn, + Arg_Vect_Log => Iir_Predefined_None, + Arg_Log_Vect => Iir_Predefined_None)), + Pkg_Bit => + (others => + (others => Iir_Predefined_None))); + + Gt_Patterns : constant Binary_Pattern_Type := + (Pkg_Std => + (Type_Unsigned => + (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Gt_Uns_Uns, + Arg_Vect_Scal => Iir_Predefined_Ieee_Numeric_Std_Gt_Uns_Nat, + Arg_Scal_Vect => Iir_Predefined_Ieee_Numeric_Std_Gt_Nat_Uns, + Arg_Vect_Log => Iir_Predefined_None, + Arg_Log_Vect => Iir_Predefined_None), + Type_Signed => + (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Gt_Sgn_Sgn, + Arg_Vect_Scal => Iir_Predefined_Ieee_Numeric_Std_Gt_Sgn_Int, + Arg_Scal_Vect => Iir_Predefined_Ieee_Numeric_Std_Gt_Int_Sgn, + Arg_Vect_Log => Iir_Predefined_None, + Arg_Log_Vect => Iir_Predefined_None)), + Pkg_Bit => + (others => + (others => Iir_Predefined_None))); + + Ge_Patterns : constant Binary_Pattern_Type := + (Pkg_Std => + (Type_Unsigned => + (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Ge_Uns_Uns, + Arg_Vect_Scal => Iir_Predefined_Ieee_Numeric_Std_Ge_Uns_Nat, + Arg_Scal_Vect => Iir_Predefined_Ieee_Numeric_Std_Ge_Nat_Uns, + Arg_Vect_Log => Iir_Predefined_None, + Arg_Log_Vect => Iir_Predefined_None), + Type_Signed => + (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Ge_Sgn_Sgn, + Arg_Vect_Scal => Iir_Predefined_Ieee_Numeric_Std_Ge_Sgn_Int, + Arg_Scal_Vect => Iir_Predefined_Ieee_Numeric_Std_Ge_Int_Sgn, + Arg_Vect_Log => Iir_Predefined_None, + Arg_Log_Vect => Iir_Predefined_None)), + Pkg_Bit => + (others => + (others => Iir_Predefined_None))); + Neg_Patterns : constant Unary_Pattern_Type := (Pkg_Std => (Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Neg_Uns, @@ -345,6 +399,12 @@ package body Vhdl.Ieee.Numeric is Handle_Binary (Ne_Patterns); when Name_Op_Less => Handle_Binary (Lt_Patterns); + when Name_Op_Less_Equal => + Handle_Binary (Le_Patterns); + when Name_Op_Greater => + Handle_Binary (Gt_Patterns); + when Name_Op_Greater_Equal => + Handle_Binary (Ge_Patterns); when Name_To_Bstring | Name_To_Ostring | Name_To_Hstring => diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 5a71204b7..c6f4a9c2a 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -4965,6 +4965,14 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Std_Logic_Unsigned_Le_Slv_Int, Iir_Predefined_Ieee_Std_Logic_Unsigned_Le_Int_Slv, + Iir_Predefined_Ieee_Std_Logic_Unsigned_Gt_Slv_Slv, + Iir_Predefined_Ieee_Std_Logic_Unsigned_Gt_Slv_Int, + Iir_Predefined_Ieee_Std_Logic_Unsigned_Gt_Int_Slv, + + Iir_Predefined_Ieee_Std_Logic_Unsigned_Ge_Slv_Slv, + Iir_Predefined_Ieee_Std_Logic_Unsigned_Ge_Slv_Int, + Iir_Predefined_Ieee_Std_Logic_Unsigned_Ge_Int_Slv, + Iir_Predefined_Ieee_Std_Logic_Unsigned_Eq_Slv_Slv, Iir_Predefined_Ieee_Std_Logic_Unsigned_Eq_Slv_Int, Iir_Predefined_Ieee_Std_Logic_Unsigned_Eq_Int_Slv |