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-rw-r--r--testsuite/gna/issue1131/repro2.vhdl5
-rw-r--r--testsuite/gna/issue852/repro1.vhdl3
2 files changed, 7 insertions, 1 deletions
diff --git a/testsuite/gna/issue1131/repro2.vhdl b/testsuite/gna/issue1131/repro2.vhdl
index 77d1a1f2e..93a63a606 100644
--- a/testsuite/gna/issue1131/repro2.vhdl
+++ b/testsuite/gna/issue1131/repro2.vhdl
@@ -24,6 +24,9 @@ architecture Behav of repro2 is
signal barr1 : my_bust_arr;
signal barr2 : bust_arr (1 downto 0)(a(3 downto 0), f(3 downto 0));
+ signal s : bit;
begin
-
+ s <= '1' after 1 ns, '0' after 2 ns;
+ businst.f(0) <= '1' after 200 ps;
+ barr1(1).a(2) <= '1' after 200 ps;
end architecture;
diff --git a/testsuite/gna/issue852/repro1.vhdl b/testsuite/gna/issue852/repro1.vhdl
index 32aacee45..8a883f3fa 100644
--- a/testsuite/gna/issue852/repro1.vhdl
+++ b/testsuite/gna/issue852/repro1.vhdl
@@ -20,4 +20,7 @@ architecture tb of repro1 is
signal arr_fifo_o :
fifo_array_o_t(0 to NB_CHAN_G - 1) (tx_dat(W_DAT_G - 1 downto 0));
begin
+ arr_fifo_o (0).tx_dat(2) <= '1' after 1 ns, '0' after 2 ns;
+
+ arr_fifo_o (1).tx_dat(3) <= '1' after 200 ps;
end tb;