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-rw-r--r--testsuite/synth/issue1332/rom_constant.vhdl28
-rwxr-xr-xtestsuite/synth/issue1332/testsuite.sh8
2 files changed, 36 insertions, 0 deletions
diff --git a/testsuite/synth/issue1332/rom_constant.vhdl b/testsuite/synth/issue1332/rom_constant.vhdl
new file mode 100644
index 000000000..2812aac3d
--- /dev/null
+++ b/testsuite/synth/issue1332/rom_constant.vhdl
@@ -0,0 +1,28 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity rom_constant is
+ port (
+ clk : in std_logic;
+ a : out std_logic_vector(7 downto 0)
+ );
+end rom_constant;
+
+architecture rtl of rom_constant is
+ constant C_IEND : std_logic_vector(12*8-1 downto 0) := (others => '1');
+ signal index : integer := 0;
+begin
+ process(clk)
+ begin
+ if rising_edge(clk) then
+ a <= C_IEND(index*8-1 downto (index-1)*8);
+
+ if index < 12 then
+ index <= index + 1;
+ else
+ index <= 0;
+ end if;
+ end if;
+ end process;
+end rtl;
+
diff --git a/testsuite/synth/issue1332/testsuite.sh b/testsuite/synth/issue1332/testsuite.sh
new file mode 100755
index 000000000..c846c4bad
--- /dev/null
+++ b/testsuite/synth/issue1332/testsuite.sh
@@ -0,0 +1,8 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+synth_analyze rom_constant
+clean
+
+echo "Test successful"