diff options
| -rw-r--r-- | testsuite/synth/issue1042/ent.vhdl | 25 | ||||
| -rwxr-xr-x | testsuite/synth/issue1042/testsuite.sh | 12 |
2 files changed, 37 insertions, 0 deletions
diff --git a/testsuite/synth/issue1042/ent.vhdl b/testsuite/synth/issue1042/ent.vhdl new file mode 100644 index 000000000..df10edc5f --- /dev/null +++ b/testsuite/synth/issue1042/ent.vhdl @@ -0,0 +1,25 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity ent is + generic ( + VAL : real := 1.5 + ); + port ( + lt : out std_logic; + lte : out std_logic; + eq : out std_logic; + gte : out std_logic; + gt : out std_logic + ); +end; + +architecture a of ent is +begin + lt <= '1' when VAL < 1.5 else '0'; + lte <= '1' when VAL <= 1.5 else '0'; + eq <= '1' when VAL = 1.5 else '0'; + gte <= '1' when VAL >= 1.5 else '0'; + gt <= '1' when VAL > 1.5 else '0'; +end; + diff --git a/testsuite/synth/issue1042/testsuite.sh b/testsuite/synth/issue1042/testsuite.sh new file mode 100755 index 000000000..bc454cfda --- /dev/null +++ b/testsuite/synth/issue1042/testsuite.sh @@ -0,0 +1,12 @@ +#! /bin/sh + +. ../../testenv.sh + +for t in ent; do + synth $t.vhdl -e $t > syn_$t.vhdl + analyze syn_$t.vhdl +done + +clean + +echo "Test successful" |