diff options
| -rw-r--r-- | testsuite/synth/synth80/test2.vhdl | 16 | ||||
| -rwxr-xr-x | testsuite/synth/synth80/testsuite.sh | 1 |
2 files changed, 17 insertions, 0 deletions
diff --git a/testsuite/synth/synth80/test2.vhdl b/testsuite/synth/synth80/test2.vhdl new file mode 100644 index 000000000..473f67c74 --- /dev/null +++ b/testsuite/synth/synth80/test2.vhdl @@ -0,0 +1,16 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity testcase is + generic ( + init_bit : std_logic := '1' + ); + port (o : out std_logic_vector (2 downto 0)); +end testcase; + +architecture rtl of testcase is + -- assigning generic to multiple parts of std_logic_vector breaks ghdlsynth + signal test_assign_vector : std_logic_vector(2 downto 0) := init_bit & "0" & init_bit; +begin + o <= test_assign_vector; +end rtl; diff --git a/testsuite/synth/synth80/testsuite.sh b/testsuite/synth/synth80/testsuite.sh index 6d097693c..e0f9a4a18 100755 --- a/testsuite/synth/synth80/testsuite.sh +++ b/testsuite/synth/synth80/testsuite.sh @@ -3,6 +3,7 @@ . ../../testenv.sh synth testcase.vhdl -e > syn_testcase.vhdl +synth test2.vhdl -e > syn_test2.vhdl clean echo "Test successful" |