From 98b805782fbe30bd05305c978f9f0fc1378be054 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Sat, 16 May 2020 08:21:54 +0200 Subject: Add a test for inout port with default value. --- testsuite/ghdl-issues/issue1312/ent.vhdl | 14 ++++++++++++++ testsuite/ghdl-issues/issue1312/testsuite.sh | 9 +++++++++ 2 files changed, 23 insertions(+) create mode 100644 testsuite/ghdl-issues/issue1312/ent.vhdl create mode 100755 testsuite/ghdl-issues/issue1312/testsuite.sh (limited to 'testsuite/ghdl-issues') diff --git a/testsuite/ghdl-issues/issue1312/ent.vhdl b/testsuite/ghdl-issues/issue1312/ent.vhdl new file mode 100644 index 0000000..efd68a5 --- /dev/null +++ b/testsuite/ghdl-issues/issue1312/ent.vhdl @@ -0,0 +1,14 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity ent is + port ( + a : inout std_logic := '0'; + d_out : out std_logic + ); +end; + +architecture a of ent is +begin + d_out <= a; +end; diff --git a/testsuite/ghdl-issues/issue1312/testsuite.sh b/testsuite/ghdl-issues/issue1312/testsuite.sh new file mode 100755 index 0000000..42d4220 --- /dev/null +++ b/testsuite/ghdl-issues/issue1312/testsuite.sh @@ -0,0 +1,9 @@ +#!/bin/sh + +topdir=../.. +. $topdir/testenv.sh + +synth_import --std=08 ent.vhdl -e + +clean +echo OK -- cgit v1.2.3