From 3aa18af227eee3ee056b853b72dfcaa860f723fb Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Sat, 23 May 2020 18:05:31 +0200 Subject: Add a test for ghdl/ghdl#1318 --- testsuite/ghdl-issues/issue1318/ram_blk.vhdl | 41 ++++++++++++++++++++++++++++ testsuite/ghdl-issues/issue1318/testsuite.sh | 10 +++++++ 2 files changed, 51 insertions(+) create mode 100644 testsuite/ghdl-issues/issue1318/ram_blk.vhdl create mode 100755 testsuite/ghdl-issues/issue1318/testsuite.sh diff --git a/testsuite/ghdl-issues/issue1318/ram_blk.vhdl b/testsuite/ghdl-issues/issue1318/ram_blk.vhdl new file mode 100644 index 0000000..85675d3 --- /dev/null +++ b/testsuite/ghdl-issues/issue1318/ram_blk.vhdl @@ -0,0 +1,41 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +entity ram_blk is + generic ( + AWIDTH : integer := 8; + DWIDTH : integer := 64 + ); + + port ( + clk : in std_logic; + rd_addr : in std_logic_vector(AWIDTH - 1 downto 0); + rd_data : out std_logic_vector(DWIDTH - 1 downto 0); + wr_en : in std_logic; + wr_addr : in std_logic_vector(AWIDTH - 1 downto 0); + wr_data : in std_logic_vector(DWIDTH - 1 downto 0) + ); + +end ram_blk; + +architecture rtl of ram_blk is + type ram_type is + array (0 to 2**AWIDTH - 1) of std_logic_vector(DWIDTH - 1 downto 0); + + signal ram : ram_type; + attribute ram_style : string; + attribute ram_style of ram : signal is "block"; + attribute ram_decomp : string; + attribute ram_decomp of ram : signal is "power"; +begin + process(clk) + begin + if rising_edge(clk) then + if wr_en = '1' then + ram(to_integer(unsigned(wr_addr))) <= wr_data; + end if; + rd_data <= ram(to_integer(unsigned(rd_addr))); + end if; + end process; +end; diff --git a/testsuite/ghdl-issues/issue1318/testsuite.sh b/testsuite/ghdl-issues/issue1318/testsuite.sh new file mode 100755 index 0000000..74b24b7 --- /dev/null +++ b/testsuite/ghdl-issues/issue1318/testsuite.sh @@ -0,0 +1,10 @@ +#!/bin/sh + +topdir=../.. +. $topdir/testenv.sh + +run_yosys -q -p "ghdl ram_blk.vhdl -e; write_verilog ram_blk.v" +grep ram_style ram_blk.v +clean + +echo OK -- cgit v1.2.3