From 11a35980defbf800e33e77cc7a82e89c33865b25 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 10 Jul 2020 17:04:10 +0200 Subject: Add Gemini Lake support The SPI hardware is pretty much unchanged from Apollo Lake. However, the IFD differs significantly enough to require special handling. Signed-off-by: Angel Pons Change-Id: Ib5dcdf204166f44a8531c19b5f363b851d2ccd77 Reviewed-on: https://review.coreboot.org/c/flashrom/+/54276 Reviewed-by: Edward O'Callaghan Tested-by: build bot (Jenkins) --- ichspi.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'ichspi.c') diff --git a/ichspi.c b/ichspi.c index 613f3fc3..57cbdeeb 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1740,6 +1740,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: + case CHIPSET_GEMINI_LAKE: num_pr = 6; /* Includes GPR0 */ reg_pr0 = PCH100_REG_FPR0; swseq_data.reg_ssfsc = PCH100_REG_SSFSC; @@ -1772,6 +1773,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: + case CHIPSET_GEMINI_LAKE: num_freg = 16; break; default: @@ -1868,6 +1870,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: + case CHIPSET_GEMINI_LAKE: tmp = mmio_readl(spibar + PCH100_REG_DLOCK); msg_pdbg("0x0c: 0x%08x (DLOCK)\n", tmp); prettyprint_pch100_reg_dlock(tmp); @@ -1943,6 +1946,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: + case CHIPSET_GEMINI_LAKE: case CHIPSET_BAYTRAIL: break; default: @@ -1976,6 +1980,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: + case CHIPSET_GEMINI_LAKE: break; default: tmp = mmio_readl(spibar + ICH9_REG_FPB); @@ -2012,8 +2017,10 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) ich_spi_mode = ich_hwseq; } - if (ich_spi_mode == ich_auto && ich_gen == CHIPSET_APOLLO_LAKE) { - msg_pdbg("Enabling hardware sequencing by default for Apollo Lake.\n"); + if (ich_spi_mode == ich_auto && + (ich_gen == CHIPSET_APOLLO_LAKE || + ich_gen == CHIPSET_GEMINI_LAKE)) { + msg_pdbg("Enabling hardware sequencing by default for Apollo/Gemini Lake.\n"); ich_spi_mode = ich_hwseq; } -- cgit v1.2.3