From cc20a9b08e849437a58402f4a64d63d3710684af Mon Sep 17 00:00:00 2001 From: Ed Swierk Date: Mon, 3 Jul 2017 13:17:18 -0700 Subject: 4BA: Allow disabling 4-byte address mode for SPI flash This allows us to support flash chips in any of the following configurations, regardless of whether the chip powers up in 3-byte or 4-byte address mode. - standard commands with extended address register (*_4ba_ereg) or direct commands (*_4ba_direct) in 3-byte address mode (.set_4ba = spi_exit_4ba_*) - standard commands (*_4ba) or direct commands (*_4ba_direct) in 4-byte address mode (.set_4ba = spi_enter_4ba_*) - direct commands (*_4ba_direct) in either address mode (.set_4ba = NULL) Change-Id: I0b25309d731426940fc50956b744b681ab599e87 Signed-off-by: Ed Swierk Reviewed-on: https://review.coreboot.org/20510 Reviewed-by: David Hendricks Tested-by: build bot (Jenkins) --- flashchips.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'flashchips.c') diff --git a/flashchips.c b/flashchips.c index 345ef88c..e5cf8a4a 100644 --- a/flashchips.c +++ b/flashchips.c @@ -14597,10 +14597,10 @@ const struct flashchip flashchips[] = { /* supports SFDP */ /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ /* FOUR_BYTE_ADDR: supports 4-bytes addressing mode */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT | FEATURE_4BA_DIRECT_READ, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT, .four_bytes_addr_funcs = { - .enter_4ba = spi_enter_4ba_b7_we, /* enter 4-bytes addressing mode by CMD B7 + WREN */ + .set_4ba = spi_enter_4ba_b7_we, /* enter 4-bytes addressing mode by CMD B7 + WREN */ .read_nbyte = spi_nbyte_read_4ba_direct, /* read directly from any mode, no need to enter 4ba */ .program_byte = spi_byte_program_4ba, /* write from 4-bytes addressing mode */ .program_nbyte = spi_nbyte_program_4ba /* write from 4-bytes addressing mode */ -- cgit v1.2.3