From d0803c8407c459e972cb9912a4a3cbfeebb93d9e Mon Sep 17 00:00:00 2001 From: Lubomir Rintel Date: Mon, 30 Oct 2017 07:57:53 +0100 Subject: vt_vx: check whether the chipset's MMIO range is configured Avoid attempting to read the SPI bases from the location 0x00000000, all zeroes mean that the chipset's MMIO area is not enabled. Change-Id: I5d3a1ba695153e854e0979ae634f8ed97e6b6293 Signed-off-by: Lubomir Rintel Reviewed-on: https://review.coreboot.org/23029 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: David Hendricks --- chipset_enable.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/chipset_enable.c b/chipset_enable.c index a499ba01..5716ebf8 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1013,10 +1013,18 @@ static int enable_flash_vt_vx(struct pci_dev *dev, const char *name) switch(dev->device_id) { case 0x8353: /* VX800/VX820 */ spi0_mm_base = pci_read_long(dev, 0xbc) << 8; + if (spi0_mm_base == 0x0) { + msg_pdbg ("MMIO not enabled!\n"); + return ERROR_FATAL; + } break; case 0x8409: /* VX855/VX875 */ case 0x8410: /* VX900 */ mmio_base = pci_read_long(dev, 0xbc) << 8; + if (mmio_base == 0x0) { + msg_pdbg ("MMIO not enabled!\n"); + return ERROR_FATAL; + } mmio_base_physmapped = physmap("VIA VX MMIO register", mmio_base, SPI_CNTL_LEN); if (mmio_base_physmapped == ERROR_PTR) return ERROR_FATAL; -- cgit v1.2.3