From 881bf1739efc915a5906287c1f237d6a13037412 Mon Sep 17 00:00:00 2001 From: Karthikeyan Ramasubramanian Date: Wed, 6 Apr 2022 16:07:38 -0600 Subject: sb600spi.c: Add Promontory chipset rev 0x71 Sabrina SoC uses SMBUS revision code 0x71 which behaves exactly as the promontory chip. Hence add 0x71 as promontory. BUG=b:228238107 TEST=Build and deploy flashrom in Skyrim. Ensure that flashrom is able to detect the SPI ROM chip, read from it and write to it successfully. Ran flashrom_tester on Skyrim (Sabrina SoC) successfully and ensured that all the tests passed. Change-Id: I2408959fbf1c105508f0a12f38418c9606280ab9 Signed-off-by: Karthikeyan Ramasubramanian Reviewed-on: https://review.coreboot.org/c/flashrom/+/63423 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Edward O'Callaghan Reviewed-by: Felix Held Reviewed-by: Raul Rangel --- sb600spi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sb600spi.c b/sb600spi.c index b1e140ba..94c4d9b4 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -130,9 +130,9 @@ static enum amd_chipset determine_generation(struct pci_dev *dev) * found on both Stoney Ridge and Zen platforms. * * The revisions I have found by searching various lspci - * outputs are as follows: 0x4b, 0x59 & 0x61. + * outputs are as follows: 0x4b, 0x59, 0x61 & 0x71. */ - } else if (rev == 0x4b || rev == 0x51 || rev == 0x59 || rev == 0x61) { + } else if (rev == 0x4b || rev == 0x51 || rev == 0x59 || rev == 0x61 || rev == 0x71) { msg_pdbg("Promontory (rev 0x%02x) detected.\n", rev); return CHIPSET_PROMONTORY; } else { -- cgit v1.2.3