| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | spi25_statusreg: Allow WRSR_EXT for Status Register 3 | Nico Huber | 2022-06-20 | 1 | -1/+1 |
| | | | | | | | | | | | | | | | | | | Spansion flash chips S25FL128L and S25FL256L use the WRSR instruction to write more than 2 registers. So align SR2 and SR3 support: The current FEATURE_WRSR_EXT is renamed to FEATURE_WRSR_EXT2 and FEATURE_WRSR_EXT3 is added. Also, WRSR3 needs a separate flag now. Verified that FEATURE_WRSR_EXT2 still works using the `dummy_flasher`. Signed-off-by: Nico Huber <nico.h@gmx.de> Change-Id: Ibdfc6eb3d2cfecbf8da0493d067031ddb079a094 Reviewed-on: https://review.coreboot.org/c/flashrom/+/64746 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Thomas Heijligen <src@posteo.de> | ||||
| * | tests: test write protection | Sergii Dmytruk | 2022-05-12 | 1 | -0/+325 |
| Tests both WP implementation and its emulation in dummy programmer. Change-Id: I49af7f6d173eb4c56c22d80b01a473b8c499c0f8 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59075 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> | |||||
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