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* Fix parallel-style programmer access from ITE IT87/Winbond W83627 SPICarl-Daniel Hailfinger2012-03-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The ITE IT87 SPI driver uses a trick to speed up reading and writing: If a flash chip is 512 kByte or less, the flash chip can be completely mapped in memory and both read and write accesses are faster that way. The current IT87 SPI code did use the parallel programmer interface for memory mapped reads and writes, but that's the wrong abstraction. It has been fixed to use mmio_read*/mmio_write* for that purpose. The Winbond W83627 SPI driver uses the same trick in its read path for all supported chip sizes. Fix it the same way. Switch internal_chip_readn to use mmio_readn as proper abstraction. Kudos to Michael Karcher for spotting the bugs. Tested-by: Johan Svensson <flashrom.js@crypt.se> Corresponding to flashrom svn r1511. Reported-by: Johan Svensson <flashrom.js@crypt.se> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Add struct flashctx * parameter to all functions accessing flash chipsCarl-Daniel Hailfinger2011-12-181-7/+11
| | | | | | | | | | | | | | | | All programmer access function prototypes except init have been made static and moved to the respective file. A few internal functions in flash chip drivers had chipaddr parameters which are no longer needed. The lines touched by flashctx changes have been adjusted to 80 columns except in header files. Corresponding to flashrom svn r1474. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Use struct flashctx instead of struct flashchip for flash chip accessCarl-Daniel Hailfinger2011-12-141-5/+5
| | | | | | | | | | | | | | | | | | | | | | Struct flashchip is used only for the flashchips array and for operations which do not access hardware, e.g. printing a list of supported flash chips. struct flashctx (flash context) contains all data available in struct flashchip, but it also contains runtime information like mapping addresses. struct flashctx is expected to grow additional members over time, a prime candidate being programmer info. struct flashctx contains all of struct flashchip with identical member layout, but struct flashctx has additional members at the end. The separation between struct flashchip/flashctx shrinks the memory requirement of the big flashchips array and allows future extension of flashctx without having to worry about bloat. Corresponding to flashrom svn r1473. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Unsignify lengths and addresses in chip functions and structsStefan Tauner2011-11-231-7/+8
| | | | | | | | | | Push those changes forward where needed to prevent new sign conversion warnings where possible. Corresponding to flashrom svn r1470. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Register Parallel/LPC/FWH programmers the same way SPI programmers are ↵Carl-Daniel Hailfinger2011-11-091-1/+1
| | | | | | | | | | | | | | | | | | | | registered All programmers are now calling programmer registration functions and direct manipulations of buses_supported are not needed/possible anymore. Note: Programmers without parallel/LPC/FWH chip support should not call register_par_programmer(). Additional fixes: Set max_rom_decode.parallel for drkaiser. Remove abuse of programmer_map_flash_region in it85spi. Annotate several FIXMEs in it85spi. Corresponding to flashrom svn r1463. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Revert "Unsignify lengths and addresses in chip functions and structs"Stefan Tauner2011-09-181-4/+4
| | | | | | | | | | | | | | | | | | | | - probe_timing was changed to unsigned although we use negative values for special cases - some code was not changed along hence did no longer compile: * dediprog's read and write functions * linux_spi's read and write functions - it introduced a number of new sign conversion warnings (http://paste.flashrom.org/view.php?id=832) To be safe this patch reverts all changes made in r1448, a corrected patch will follow later. Thanks to idwer for pointing out the problem first! Corresponding to flashrom svn r1450. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Unsignify lengths and addresses in chip functions and structsStefan Tauner2011-09-181-4/+4
| | | | | | | Corresponding to flashrom svn r1448. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Change programmer selection in cli and generic codeCarl-Daniel Hailfinger2011-09-081-4/+2
| | | | | | | | | | | | | | Bugfix: Do not accept multiple conflicting --programmer selections. Restriction: Do not accept multiple --programmer selections even if there is no conflict. Unexport the programmer variable. programmer_init requires the programmer as first parameter. The default programmer selection is now part of cli_classic. Corresponding to flashrom svn r1433. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Fixup of r1397Carl-Daniel Hailfinger2011-08-151-1/+2
| | | | | | | | | | | | | | - Mixing uninitialized and initialized local variables leads to confusion. - ft2232_spi error cases should have gotten some error handling, and that's the reason the curly braces were there. - Fixing typos/wording in some places would have been nice given that those places were touched anyway. Corresponding to flashrom svn r1413. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Random whitespace and coding-style fixesUwe Hermann2011-07-281-22/+23
| | | | | | | | | | | | Also, indentation fixes, e.g. due to conversion to msg_*, use ARRAY_SIZE where possible, wrap overly long line, etc. Compile-tested. There should be no functional changes. Corresponding to flashrom svn r1397. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Rename CHIP_BUSTYPE_FOO to BUS_FOOCarl-Daniel Hailfinger2011-07-271-1/+1
| | | | | | | | | It's shorter to type, and we have less problems with the 80 column limit. Corresponding to flashrom svn r1396. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Kill central list of SPI programmersMichael Karcher2011-05-111-5/+19
| | | | | | | | | | | | | | | | | | Remove the array spi_programmer, replace it by dynamic registration instead. Also initially start with no busses supported, and switch to the default non-SPI only for the internal programmer. Also this patch changes the initialization for the buses_supported variable from "everything-except-SPI" to "nothing". All programmers have to set the bus type on their own, and this enables register_spi_programmer to just add the SPI both for on-board SPI interfaces (where the internal programmer already detected the other bus types), as well as for external programmers (where we have the default "none"). Corresponding to flashrom svn r1299. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for more than one Super I/O or EC per machineCarl-Daniel Hailfinger2011-04-271-55/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | Flashrom currently only supports exactly one Super I/O or Embedded Controller, and this means quite a few notebooks and a small subset of desktop/server boards cannot be handled reliably and easily. Allow detection and initialization of up to 3 Super I/O and/or EC chips. WARNING! If a Super I/O or EC responds on multiple ports (0x2e and 0x4e), the code will do the wrong thing (namely, initialize the hardware twice). I have no idea if we should handle such situations, and whether we should ignore the second chip with identical ID or not. Initializing the hardware twice for the IT87* family is _not_ a problem, but I don't know how well IT85* can handle it (and whether IT85* would listen at more than one port anyway). Corresponding to flashrom svn r1289. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Thanks to Thomas Schneider for testing on a board with ITE IT87* SPI. Test report (success) is here: http://paste.flashrom.org/view.php?id=379 Thanks to David Hendricks for testing on a Google Cr-48 laptop with ITE IT85* EC SPI. Test report (success) is here: http://www.flashrom.org/pipermail/flashrom/2011-April/006275.html Acked-by: David Hendricks <dhendrix@google.com>
* Fix internal offset calculations for SPI BYTE PROGRAM and SPI AAI PROGRAMCarl-Daniel Hailfinger2010-10-271-5/+6
| | | | | | | | | | | | | | | | The bug was invisible so far because we always started at offset 0. The pending partial write patch uses nonzero start offsets and trips over this bug. Clarify a few comments in IT87 SPI. Thanks to Idwer Vollering for reporting write breakage with my latest partial write patch. This should fix the underlying problem. Corresponding to flashrom svn r1217. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Idwer Vollering <vidwer@gmail.com>
* Switch all flash chips to partial writeCarl-Daniel Hailfinger2010-10-131-12/+14
| | | | | | | | | | | | | | | The inner write functions which handle partial write are renamed to the original name of their wrappers. The write wrappers are removed. Corresponding to flashrom svn r1211. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Maciej Pijanka <maciej.pijanka@gmail.com> Tested-by: Andrew Morgan <ziltro@ziltro.com> Tested-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Idwer Vollering <vidwer@gmail.com> Tested-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Sean Nelson <audiohacked@gmail.com>
* Updates to the board and chips status tablesUwe Hermann2010-09-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mark the following boards as tested: - Tyan S2933 (Thunder n3600S) (reported by Pendic Peter <nigma@bluewin.ch>) http://www.flashrom.org/pipermail/flashrom/2010-August/004375.html - MSI MS-7642 (890GXM-G65) (reported by Alan McMahon <pam@aldersgate.co.uk>) http://www.flashrom.org/pipermail/flashrom/2010-August/004393.html - Shuttle X50/X50(B) (reported by Ed Driesen <ed@omts.be>) http://www.flashrom.org/pipermail/flashrom/2010-August/004472.html (the "B" variant is just black instead of white, no hardware differences as far as I can see) - ASUS M2NPV-VM (reported by Antti Palosaari <crope@iki.fi>) http://www.flashrom.org/pipermail/flashrom/2010-August/004476.html - ZOTAC ZBOX HD-ID11 (reported by s. ewgen <sewgen@gmail.com>) http://www.flashrom.org/pipermail/flashrom/2010-August/004512.html - ASRock A330GC (reported by Daniel Flinkmann <DFlinkmann@gmx.de>) http://www.flashrom.org/pipermail/flashrom/2010-August/004517.html - Congatec conga-X852 (reported by Mario Rogen <Mario.Rogen@sie.at>) http://www.coreboot.org/pipermail/coreboot/2008-November/041433.html - IEI PICOe-9452 (reported by Mario Rogen <Mario.Rogen@sie.at>) http://www.coreboot.org/pipermail/coreboot/2008-November/041433.html - Lex CV700A (reported by Mario Rogen <Mario.Rogen@sie.at>) http://www.coreboot.org/pipermail/coreboot/2008-November/041433.html - Portwell PEB-4700VLA (reported by Mario Rogen <Mario.Rogen@sie.at>) http://www.coreboot.org/pipermail/coreboot/2008-November/041433.html Mark the following chips as tested: - SST SST39SF040 (reported by Mattias Mattsson <vitplister@gmail.com>) http://www.flashrom.org/pipermail/flashrom/2010-August/004414.html - Eon EN25F80 (reported by Ed Driesen <ed@omts.be>) http://www.flashrom.org/pipermail/flashrom/2010-August/004472.html - SyncMOS/MoselVitelic {F,S,V}29C51002T (reported by Mattias Mattsson <vitplister@gmail.com>) http://www.flashrom.org/pipermail/flashrom/2010-August/004475.html - PMC Pm29F002T (reported by Tadas S <mrtadis@gmail.com>) http://www.flashrom.org/pipermail/flashrom/2010-September/004583.html Also: - Fix a few whitespace issues and cosmetics while I'm at it. - Add the board name (in addition to the Sxxxx number) to all Tyan boards. Corresponding to flashrom svn r1153. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Split off programmer.h from flash.hCarl-Daniel Hailfinger2010-07-271-0/+1
| | | | | | | | | | | | | | | | | | | | | Programmer specific functions are of absolutely no interest to any file except those dealing with programmer specific actions (special SPI commands and the generic core). The new header structure is as follows (and yes, improvements are possible): flashchips.h flash chip IDs chipdrivers.h chip-specific read/write/... functions flash.h common header for all stuff that doesn't fit elsewhere hwaccess.h hardware access functions programmer.h programmer specific functions coreboot_tables.h header from coreboot, internal programmer only spi.h SPI command definitions Corresponding to flashrom svn r1112. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Use generic unlocking infrastructure for SPI chipsCarl-Daniel Hailfinger2010-07-141-1/+0
| | | | | | | | | Actually check if the unlock worked instead of just assuming it worked. Corresponding to flashrom svn r1082. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Convert SPI chips to partial writeCarl-Daniel Hailfinger2010-07-141-16/+26
| | | | | | | | | | However, wrap the write functions in a compat layer to allow converting the rest of flashrom later. Tested on Intel NM10 by David Hendricks. Corresponding to flashrom svn r1080. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Generify support for ITE IT8705 Super I/OCarl-Daniel Hailfinger2010-07-101-79/+85
| | | | | | | | | | | | | | | | | Autodetect the ITE IT8705 Super I/O and enable flash writes if it performs LPC->Parallel translation. Remove board enables which triggered the IT8705 write enable manually. Change the IT87 SPI special case to cover IT87 LPC->SPI and LPC->Parallel translation. Corresponding to flashrom svn r1073. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested on Syntax SV266A. Acked-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested on Shuttle AK38N, all operations work fine. Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Unify programmer parameter extractionCarl-Daniel Hailfinger2010-07-081-1/+1
| | | | | | | | | | | Make programmer_param static by converting all users to extract_programmer_param. Programmer parameters can no longer be separated with a colon, they have to be separated with a comma. Corresponding to flashrom svn r1072. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Various places in the flashrom source feature custom parameter extraction ↵Carl-Daniel Hailfinger2010-07-061-15/+17
| | | | | | | | | | | | | | | | | | | | from programmer_param This led to wildly differing syntax for programmer parameters, and it also voids pretty much every assumption you could make about programmer_param. The latter is a problem for libflashrom. Use extract_param everywhere, clean up related code and make it more foolproof. Add two instances of exit(1) where we have no option to return an error. Remove six instances of exit(1) where returning an error was possible. WARNING: This changes programmer parameter syntax for a few programmers! Corresponding to flashrom svn r1070. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Kill global variables, constants and functions if local scope sufficesCarl-Daniel Hailfinger2010-07-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Constify variables where possible. Initialize programmer-related variables explicitly in programmer_init to allow running programmer_init from a clean state after programmer_shutdown. Prohibit registering programmer shutdown functions before init or after shutdown. Kill some dead code. Rename global variables with namespace-polluting names. Use a previously unused locking helper function in sst49lfxxxc.c. This is needed for libflashrom. Effects on the binary size of flashrom are minimal (300 bytes shrinkage), but the data section shrinks by 4384 bytes, and that's a good thing if flashrom is operating in constrained envionments. Corresponding to flashrom svn r1068. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Handle the following architectures in generic flashrom codeCarl-Daniel Hailfinger2010-05-261-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - x86/x86_64 (little endian) - PowerPC (big endian) - MIPS (big+little endian) No changes to programmer specific code. This means any drivers with MMIO access will _not_ suddenly start working on big endian systems, but with this patch everything is in place to fix them. Compilation should work on all architectures listed above for all drivers except nic3com and nicrealtek which require PCI Port IO which is x86-only for now. To compile without nic3com and nicrealtek, run make distclean make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no Thanks to Misha Manulis for testing early versions of this patch on PowerPC (big endian) with the satasii programmer. Thanks to Segher Boessenkool for design review and for helping out with compiler tricks and pointing out that we need eieio on PowerPC. Thanks to Vladimir Serbinenko for compile testing on MIPS (little endian) and PowerPC (big endian) and for runtime testing on MIPS (little endian). Thanks to David Daney for compile testing on MIPS (big endian). Thanks to Uwe Hermann for compile and runtime testing on x86_64. DO NOT RUN flashrom ON NON-X86 AFTER APPLYING THIS PATCH! This patch only provides the infrastructure, but does not convert any drivers, so flashrom will compile, but it won't do the right thing on non-x86 platforms. Corresponding to flashrom svn r1013. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Misha Manulis <misha@manulis.com> Acked-by: Vladimir 'phcoder/φ-coder' Serbinenko <phcoder@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Segher Boessenkool <segher@kernel.crashing.org>
* Add ITE IT8720 SPI supportVadim Girlin2010-03-301-2/+6
| | | | | | | | | | | Original patch by Vadim Girlin. Message printing updated by Carl-Daniel Hailfinger. Corresponding to flashrom svn r989. Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Autodetect ITE IT87* LPC->SPI translation on all boards without the need for ↵Carl-Daniel Hailfinger2010-03-251-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | a board enable Move boards which had an IT87* SPI board enable from the board enable list to the OK list. Mark the Gigabyte GA-MA78GPM-DS2H as OK. Change the it87spi forced port parameter to it87spiport=... Fix incorrect indentation in the man page. Tested by Ward Vandewege on both variants of the Gigabyte GA-M57SLI-S4 http://www.flashrom.org/pipermail/flashrom/2010-March/002712.html Tested by 李彥學 (Ian-Xue Li) on the Gigabyte GA-MA78GPM-DS2H http://www.flashrom.org/pipermail/flashrom/2010-March/002723.html Corresponding to flashrom svn r983. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ward Vandewege <ward@gnu.org>
* Various coding style and cosmetic changesUwe Hermann2010-03-131-2/+2
| | | | | | | | | | | | | - Fix coding-style, whitespace, and indentation in a few places. - Consistently use the same spelling ("Super I/O") everywhere. Corresponding to flashrom svn r933. - Make some flashrom stdout output look a bit nicer. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Split spi.c into programmer and chip code Remove chipdriver.h include from ↵Sean Nelson2010-02-261-0/+1
| | | | | | | | | | | | | | | | | | | flash.h Some of the spi programmer drivers required chipdrivers.h, needs fixing later: it87spi.c ichspi.c sb600spi.c wbsio_spi.c buspirate_spi.c ft2232spi.c bitbang_spi.c dediprog.c Corresponding to flashrom svn r914. Signed-off-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Convert all messages in it87spi.c to the new message infrastructureSean Nelson2010-01-101-16/+16
| | | | | | | | | Change one msg_pdbg to msg_pinfo, change 7 msg_pinfo to msg_pdbg. Corresponding to flashrom svn r855. Signed-off-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* SuperI/O detection now happens unconditionally and before the chipset enableCarl-Daniel Hailfinger2009-12-221-11/+53
| | | | | | | | | | | | | | | | | We could run it after chipset enable, but it definitely has to happen before board enable because the board enable usually accesses the SuperI/O. With this patch, it is possible to add a struct superio to the board enable table for more accurate matching in case subsystem IDs are ambiguous. This patch focuses on the generic infrastructure aspect and on support for IT8712F/IT8716F. Thanks go to Adrian Glaubitz and Ward Vandewege for testing. Corresponding to flashrom svn r813. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Luc Verhaegen <libv@skynet.be> Acked-by: Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
* Store block sizes and corresponding erase functions in struct flashchipCarl-Daniel Hailfinger2009-09-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I decided to fill in the info for a few chips to illustrate how this works both for uniform and non-uniform sector sizes. struct eraseblock{ int size; /* Eraseblock size */ int count; /* Number of contiguous blocks with that size */ }; struct eraseblock doesn't correspond with a single erase block, but with a group of contiguous erase blocks having the same size. Given a (top boot block) flash chip with the following weird, but real-life structure: top 16384 8192 8192 32768 65536 65536 65536 65536 65536 65536 65536 bottom we get the following encoding: {65536,7},{32768,1},{8192,2},{16384,1} Although the number of blocks is bigger than 4, the number of block groups is only 4. If you ever add some flash chips with more than 4 contiguous block groups, the definition will not fit into the 4-member array anymore and gcc will recognize that and error out. No undetected overflow possible. In that case, you simply increase array size a bit. For modern flash chips with uniform erase block size, you only need one array member anyway. Of course data types will need to be changed if you ever get flash chips with more than 2^30 erase blocks, but even with the lowest known erase granularity of 256 bytes, these flash chips will have to have a size of a quarter Terabyte. I'm pretty confident we won't see such big EEPROMs in the near future (or at least not attached in a way that makes flashrom usable). For SPI chips, we even have a guaranteed safety factor of 4096 over the maximum SPI chip size (which is 2^24). And if such a big flash chip has uniform erase block size, you could even split it among the 4 array members. If you change int count to unsigned int count, the storable size doubles. So with a split and a slight change of data type, the maximum ROM chip size is 2 Terabytes. Since many chips have multiple block erase functions where the eraseblock layout depends on the block erase function, this patch couples the block erase functions with their eraseblock layouts. struct block_eraser { struct eraseblock{ unsigned int size; /* Eraseblock size */ unsigned int count; /* Number of contiguous blocks with that size */ } eraseblocks[NUM_ERASEREGIONS]; int (*block_erase) (struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen); } block_erasers[NUM_ERASEFUNCTIONS]; Corresponding to flashrom svn r719. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Standardize on using __func__ instead of __FUNCTION__Uwe Hermann2009-09-021-2/+2
| | | | | | | | | | | | | | | The __func__ variant is standardized in C99 and recommended to be used instead of __FUNCTION__ in the gcc info page. Only _very_ old versions of gcc did not know about __func__, but we've been using both __func__ and __FUNCTION__ for a long while now, and nobody complained about this, so all our users seem to use recent enough compilers. Corresponding to flashrom svn r711. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Use a common parameter variable for all programmersCarl-Daniel Hailfinger2009-08-121-5/+4
| | | | | | | | | | This allows us to reduce #ifdef clauses a lot if we compile out some programmers completely. Corresponding to flashrom svn r679. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Replace remaining explicit erases in SPI programmer drivers with auto-erasesCarl-Daniel Hailfinger2009-08-101-27/+9
| | | | | | | | | | | | | Some SPI chip drivers and the generic 1-byte SPI chip write functions didn't include the automatic erase present in other chip drivers. Since the majority is definitely auto-erase, change the remaining explicit-erase cases to be auto-erase as well. Corresponding to flashrom svn r673. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carlos Arnau Perez <cemede@gmail.com>
* Use a distinct return code for SPI commands with unsupported/invalid lengthCarl-Daniel Hailfinger2009-07-141-2/+2
| | | | | | | | | | | Some drivers support only a few combinations of read/write length and return error otherwise. Having a distinct return code for this error means we can handle it in upper layers. Corresponding to flashrom svn r653. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Convert SPI byte program to use the multicommand infrastructureCarl-Daniel Hailfinger2009-07-121-4/+2
| | | | | | | | | | Tested-by: Jakob Bornecrantz <wallbraker@gmail.com> Corresponding to flashrom svn r651. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested it on Epia-m700 worked okay. Acked-by: Jakob Bornecrantz <wallbraker@gmail.com>
* Add an optional flash port parameter for IT87* SPI controllers in standalone ↵Carl-Daniel Hailfinger2009-07-111-5/+22
| | | | | | | | | | | | | programmer mode If the parameter is set, the IT87* SPI driver will set the I/O base port of the IT87* SPI controller interface to the port specified in the parameter. Usage: flashrom -p it87spi=port=0x820 Corresponding to flashrom svn r646. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add SPI multicommand infrastructureCarl-Daniel Hailfinger2009-07-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some SPI opcodes need to be sent in direct succession after each other without any chip deselect happening in between. A prominent example is WREN (Write Enable) directly before PP (Page Program). Intel calls the first opcode in such a row "preopcode". Right now, we ignore the direct succession requirement completely and it works pretty well because most onboard SPI masters have a timing or heuristics which make the problem disappear. The FT2232 SPI flasher is different. Since it is an external flasher, timing is very different to what we can expect from onboard flashers and this leads to failure at slow speeds. This patch allows any function to submit multiple SPI commands in a stream to any flasher. Support in the individual flashers isn't implemented yet, so there is one generic function which passes the each command in the stream one-by-one to the command functions of the selected SPI flash driver. Tested-by: Jakob Bornecrantz <wallbraker@gmail.com> Corresponding to flashrom svn r645. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Jakob Bornecrantz <wallbraker@gmail.com>
* Handle programmer init errors and abortCarl-Daniel Hailfinger2009-06-281-2/+6
| | | | | | | | | | | | | | If the programmer didn't initialize correctly, it is pointless to continue. Fix standalone IT87* SPI init to set flashbus to NONE if no IT87* SPI communication is possible. Print the I/O port detected by the IT87* SPI code. Corresponding to flashrom svn r633. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ward Vandewege <ward@gnu.org>
* Support reads of arbitrary rangeCarl-Daniel Hailfinger2009-06-161-3/+3
| | | | | | | | | | | | That means you can tell flashrom to read exactly bytes 12345-56789 (start 12345, length 44445) and it will not fetch a single byte more. Uwe tested this on one LPC, one SPI, and one parallel flash board. Corresponding to flashrom svn r596. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Every SPI host controller implemented its own way to read flash chipsCarl-Daniel Hailfinger2009-06-131-8/+2
| | | | | | | | | | | | | | | | | | | | | | This was partly due to a design problem in the abstraction layer. There should be exactly two different functions for reading SPI chips: - memory mapped reads - SPI command reads. Each of them should be contained in a separate function, optionally taking parameters where needed. This patch solves the problems mentioned above, shortens the code and makes the code logic a lot more obvious. Since open-coding the min() function leads to errors, include it in this patch as well. Corresponding to flashrom svn r589. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com>
* Add programmer-specific delay functionsCarl-Daniel Hailfinger2009-06-051-2/+2
| | | | | | | | | | | Add external programmer delay functions so external programmers can handle the delay on their own if needed. Corresponding to flashrom svn r578. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Urja Rannikko <urjaman@gmail.com>
* Only probe for chips with compatible bus protocolsCarl-Daniel Hailfinger2009-06-011-3/+12
| | | | | | | | | | | | | | | | | | It doesn't make sense to probe for SPI chips on a LPC host, nor does it make sense to probe for LPC chips on a Parallel host. This change is backwards compatible, but adding host protocol info to chipset init functions will speed up probing. Once all chipset init functions are updated and the Winbond W29EE011 and AMIC A49LF040A chip definitions are updated, the W29EE011 workaround can be deleted as the W29/A49 conflict magically disappears. Corresponding to flashrom svn r560. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested on real hardware and Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add IT87xx SPI as external flasher optionCarl-Daniel Hailfinger2009-05-311-3/+16
| | | | | | | | | | This is a fast way to test if a IT87xx board_enable() would work. Corresponding to flashrom svn r557. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Harald Gutmann <harald.gutmann@gmx.net> Acked-by: Harald Gutmann <harald.gutmann@gmx.net>
* Add bus type annotation to struct flashchipsCarl-Daniel Hailfinger2009-05-311-1/+1
| | | | | | | | | | | | | | | | | | | Right now, the annotation only differentiates between SPI and non-SPI. Anyone who knows more about a specific flash chip should feel free to update it. The existing flashbus variable was abused to denote the SPI controller type. Use an aptly named variable for that purpose. Once this patch is merged, the chipset/programmer init functions can set supported flash chip types and flashrom can automatically select only matching probe/read/erase/write functions. A side benefit of that will be the elimination of the Winbond W29EE011 vs. AMIC A49LF040A conflict. Corresponding to flashrom svn r556. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Refactor SuperIO accessesCarl-Daniel Hailfinger2009-05-251-23/+10
| | | | | | | | | | | | | | | We had duplicated code under different names and even open-coded some functions in some places. wbsio_read/regval -> sio_read wbsio_write/regwrite -> sio_write wbsio_mask -> sio_mask board_biostar_p4m80_m4 now uses existing IT87 functions. Corresponding to flashrom svn r547. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Luc Verhaegen <libv@skynet.be>
* Drop unused/duplicated #includes and some dead codeUwe Hermann2009-05-161-3/+0
| | | | | | | | | Build-tested on 32bit x86. Corresponding to flashrom svn r521. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Chips like the SST SST25VF080B can only handle single byte writes outside ↵Carl-Daniel Hailfinger2009-05-091-4/+10
| | | | | | | | | | | | | | | | | | AAI mode Change SPI architecture to handle 1-byte chunk chip writing differently from 256-byte chunk chip writing. Annotate SPI chip write functions with _256 or _1 suffix denoting the number of bytes they write at maximum. The 1-byte chunk writing is cut-n-pasted to different SPI drivers right now. A later patch can move them to the generic spi_chip_write_1. Corresponding to flashrom svn r485. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Refine handling of spi_write_enable() failures to fix chip erases on ichspiCarl-Daniel Hailfinger2009-05-091-3/+10
| | | | | | | | | | | | | | | Until the ICH SPI driver can handle preopcodes as standalone opcodes, we should handle such special opcode failure gracefully on ICH and compatible chipsets. This fixes chip erase on almost all ICH+VIA SPI masters. Thanks to Ali Nadalizadeh for helping track down this bug! Corresponding to flashrom svn r484. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* IT8718F works just like IT8716FPeter Stuge2009-01-121-1/+1
| | | | | | | Corresponding to flashrom svn r379 and coreboot v2 svn r3858. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Yul Rottmann <yulrottmann@bitel.net>
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