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* Add ich_descriptor_tool to decode all flash descriptors stored in a flash ↵Stefan Tauner2011-12-241-0/+527
| | | | | | | | | | | | | | | | | | | | | | | | | | | | dump file This patch adds an external utility that shares most of the existing descriptor decoding source code. Additionally to what is available via FDOC/FDOD this allows to access: - the softstraps which are used to configure the chipset by flash content without the need for BIOS routines. on ICH8 it is possible to read those with FDOC/FDOC too, but this was removed in later chipsets. - the ME VSCC (Vendor Specific Component Capabilities) table. simply put, this is an SPI chip database used to figure out the flash's capabilities. - the MAC address stored in the GbE image. Intel thinks this information should be confidential for ICH9 and up, but references some tidbits in their public documentation. This patch includes the human-readable information for ICH8, Ibex Peak (5 series) and Cougar Point (6 series); the latter two were obtained from leaked "SPI Flash Programming Guides" found by google. Data regarding ICH9 and 10 is unknown to us yet. It can probably found in: "Intel® ICH7, ICH8, ICH9 and ICH10 — SPI Family Flash Programming Guide" Information regarding the upcoming Panther Point chipset is also not included. Corresponding to flashrom svn r1480. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Matthias Wenzel <bios@mazzoo.de>
* ichspi: add (partially) dead support code for Intel Hardware SequencingStefan Tauner2011-10-201-0/+28
| | | | | | | | | | This was done to ease the review. Another patch will hook up (and explain) this code later. Corresponding to flashrom svn r1452. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: add ICH/PCH flash descriptor decoding via FDOC/FDODStefan Tauner2011-09-151-0/+288
Based on the work of Matthias 'mazzoo' Wenzel this patch adds pretty printing of those ICH/PCH flash descriptor sections that are cached/mapped by the chipset (and which are therefore reachable via FDOC/FDOD registers). this includes the following: - content section: describes the image and some generic properties (number of sections, offset of sections, PCH/ICH and MCH/PROC strap offsets and lengths) - component section: identify the different SPI flash chips and their capabilities. - region section similarly to a partition table this describes the different regions. the content of FLREG* is derived from this section. - master section defines SPI master (host, ME, GbE) access rights of the individual regions. the content of PR* is derived from this section. this is only a part of the data included in the descriptor. other information can be retrieved from a complete binary dump of the descriptor region only. this patch also adds macros and pretty printing for "Vendor Specific Component Capabilities" registers: there are two of them: lower and upper. they describe the properties of the address space divided by FPBA (which allows to use multiple flash chips or partitions with different properties). the properties of all supported flash chips (together with their RDIDs) are stored in the same format in table in a descriptor section (which is used by the ME apparently). a later patch will use the macros outside of ichspi.c which is the reason why the prettyprinting function and the register bit macros are not defined in ichspi.c but ich_descriptors.h (else they would be moved in the follow-up patch). because this patch relies on (compiler) implementation-specific layouting of bit-fields, it checks for correct layout before taking any action on runtime. Corresponding to flashrom svn r1443. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>