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* ichspi: use a variable to distinguish ich generations instead of ↵Stefan Tauner2011-11-061-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi_programmer->type The type member is enough most of the time to derive the wanted information, but - not always (e.g. ich_set_bbar), - only available after registration, which we want to delay till the end of init, and - we really want to distinguish between chipset version-grained attributes which are not reflected by the registered programmer. Hence this patch introduces a new static variable which is set up early by the init functions and allows us to get rid of all "switch (spi_programmer->type)" in ichspi.c. We reuse the enum introduced for descriptor mode for the type of the new variable. Previously magic numbers were passed by chipset_enable wrappers. Now they use the enumeration items too. To get this working the enum definition had to be moved to programmer.h. Another noteworthy detail: previously we have checked for a valid programmer/ich generation all over the place. I have removed those checks and added one single check in the init method. Calling any function of a programmer without executing the init method first, is undefined behavior. Corresponding to flashrom svn r1460. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add a bunch of new/tested stuff and various small changes 8Paul Menzel2011-10-211-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested mainboards: OK: - ASUS Crosshair II Formula http://www.flashrom.org/pipermail/flashrom/2011-September/007888.html - ASUS K8N http://paste.flashrom.org/view.php?id=856 - ASUS M2N-E SLI http://www.flashrom.org/pipermail/flashrom/2011-September/007909.html - ASUS M3N78-VM http://www.flashrom.org/pipermail/flashrom/2011-May/006496.html - ASUS M4A78LT-M LE http://www.flashrom.org/pipermail/flashrom/2011-September/007869.html - ASUS M4A89GTD PRO http://www.flashrom.org/pipermail/flashrom/2011-February/005824.html - MSI A75MA-G55 (MS-7696) http://www.flashrom.org/pipermail/flashrom/2011-October/008055.html - PCCHIPS M598LMR (V9.0) http://www.flashrom.org/pipermail/flashrom/2011-October/008051.html - ECS P4VXMS (V1.0A) http://www.flashrom.org/pipermail/flashrom/2011-September/007986.html - Foxconn P4M800P7MA-RS2 http://www.flashrom.org/pipermail/flashrom/2011-October/008114.html - GIGABYTE GA-P67A-UD3P http://www.flashrom.org/pipermail/flashrom/2011-September/007930.html - GIGABYTE Z68MX-UD2H-B http://www.flashrom.org/pipermail/flashrom/2011-October/008080.html - ZOTAC Fusion-ITX WiFi (FUSION350-A-E) http://www.flashrom.org/pipermail/flashrom/2011-October/008011.html NOT OK: - ASUS P8B-E/4L http://www.flashrom.org/pipermail/flashrom/2011-October/008047.html - ASUS P8B WS http://www.flashrom.org/pipermail/flashrom/2011-October/008081.html Tested chipsets: - MCP78S (:075d) http://www.flashrom.org/pipermail/flashrom/2011-August/007612.html - VT8233 (:3074) http://www.flashrom.org/pipermail/flashrom/2011-September/007986.html - SiS 530 (:0530) http://www.flashrom.org/pipermail/flashrom/2011-October/008051.html - P67 (:1c46) http://www.flashrom.org/pipermail/flashrom/2011-September/007930.html - Z68 (:1c44) http://www.flashrom.org/pipermail/flashrom/2011-October/008080.html Tested flash chips: - mark AMIC A29002T as TEST_OK_PREW http://www.flashrom.org/pipermail/flashrom/2011-October/008085.html - mark Eon EN29F002(A)(N)T as TEST_OK_PREW http://www.flashrom.org/pipermail/flashrom/2011-October/008053.html - mark EonEN25F16 as TEST_OK_PREW http://www.flashrom.org/pipermail/flashrom/2011-February/005824.html - mark Macronix MX29F002(N)T as TEST_OK_PREW http://www.flashrom.org/pipermail/flashrom/2011-October/008083.html - mark Pm39LV040 as TEST_OK_PR http://www.flashrom.org/pipermail/flashrom/2011-September/007942.html - mark Pm39LV010 as TEST_OK_PREW http://www.flashrom.org/pipermail/flashrom/2011-September/007942.html - mark SST49LF008A as TEST_OK_PREW http://www.flashrom.org/pipermail/flashrom/2011-September/007989.html - mark SyncMOS {F,S,V}29C51002T as TEST_OK_PREW http://www.flashrom.org/pipermail/flashrom/2011-October/008052.html - mark W39V040B as write tested http://www.flashrom.org/pipermail/flashrom/2011-October/008114.html - mark W39V040C as TEST_OK_PREW http://www.flashrom.org/pipermail/flashrom/2011-October/008114.html - remove superfluous line break in enable_flash_ich_dc_spi - m->M in "min" and "max" (voltage) in print_wiki.c Corresponding to flashrom svn r1454. - spi25: get rid of unneccessary line breaks (on failed probes) which is Acked-by: Uwe Hermann <uwe@hermann-uwe.de> - rayer_spi.c: Remove double word: `s/the the/the/` which is Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> The parts added until 2011-10-14 (most of this patch) were Acked-by: Uwe Hermann <uwe@hermann-uwe.de> everything else is Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Revamp the warning of failing to set BIOS write enable in enable_flash_ichStefan Tauner2011-09-091-7/+8
| | | | | | | | | | | - introduce a new variable 'wanted' that is used instead of 'new' - use 'new' for the actual value contained in BIOS_CNTL after we tried to write it - rephrase the warning which now also includes the old and new values besides the wanted one Corresponding to flashrom svn r1435. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add Intel Tunnel Creek chipset support, mark it as testedIngo Feldschmid2011-09-071-1/+45
| | | | | | | | | | | | | | | | | | | | Intel's Tunnel Creek chipset supports both an SPI and an LPC bus. Set the chipset table entry for Tunnel Creek to the new function enable_flash_tunnelcreek(), which will read the hardware straps and return support for the bus that has been used for booting. This function uses ich_init_spi() with ich_generation set to 7 for initializing the SPI bus if necessary. SPI functionality tested on actual hardware, Tunnel Creek LPC interface not tested yet (missing hardware for that). Log file / success report: http://www.flashrom.org/pipermail/flashrom/2011-September/007823.html Corresponding to flashrom svn r1430. Signed-off-by: Ingo Feldschmid <ifel@msc-ge.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Kill all exit() calls in chipset_enable.cTadas Slotkus2011-09-061-5/+4
| | | | | | | Corresponding to flashrom svn r1429. Signed-off-by: Tadas Slotkus <devtadas@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Introduce ERROR_FATAL, abort upon failed chipset enablesTadas Slotkus2011-09-031-0/+4
| | | | | | | Corresponding to flashrom svn r1426. Signed-off-by: Tadas Slotkus <devtadas@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add a bunch of new/tested stuff and various small changes 7Sylvain "ythier" Hitier2011-09-031-7/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - add Asus Crosshair IV Extreme to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-August/007640.html - add Biostar N68S3+ to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-September/007788.html - add P7H55-M LX to the list of supported boards although flashrom works correctly, it is marked as not ok, because flashing the vendor image will break the LAN interface. - add GA-X58A-UD7 to the list of supported boards http://paste.flashrom.org/view.php?id=739 - add Asus P4P800-VM to print.c (has a working board enable) - add Asus K8V-X to print.c reported by florz http://paste.flashrom.org/view.php?id=742 - add Intel D865GLC to print.c as non-working (ICH5 with BIOS lock enable) reported by jmd on IRC http://paste.flashrom.org/view.php?id=775 - add Intel DH67CF to print.c as non-working (H67 with BIOS lock enable and locked ME region) http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html - add ECS P4M800PRO-M (V1.0A) to the list of supported boards reported by dweg on IRC (hot flashed a SST49LF040B, original was W39V040B) - add X8DTU-6TF+ to print.c (needs ME unlocking) http://www.flashrom.org/pipermail/flashrom/2011-August/007553.html - add Shuttle FH67 (used in the SH67H3 barebone) to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-August/007749.html - add Tyan S2912 to the list of supported boards reported by erlan on IRC - add ZOTAC GeForce 8200 to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-August/007612.html - mark AT25DF321A as TEST_OK_PROBE http://www.flashrom.org/pipermail/flashrom/2011-August/007553.html - mark 28F001BN/BX-T as TEST_OK_PR http://www.flashrom.org/pipermail/flashrom/2011-July/007208.html - rename MX29F002 http://patchwork.coreboot.org/patch/2794/ - mark SST39SF040 as fully tested reported by Florian 'florz' Zumbiehl http://paste.flashrom.org/view.php?id=742 - mark SST49LF040B as fully tested reported by dweg on IRC and later by Armin on the ml: http://www.flashrom.org/pipermail/flashrom/2011-August/007764.html - mark H55 chipset as OK http://www.flashrom.org/pipermail/flashrom/2011-July/007432.html - mark H67 chipset as OK http://www.flashrom.org/pipermail/flashrom/2011-August/007749.html - mark a MCP61 version as OK http://www.flashrom.org/pipermail/flashrom/2011-September/007788.html - add preliminary X79 (patsburg) PCI IDs 0x1d40 was reported already as working (not archived in our pipermail?) http://marc.info/?l=flashrom&m=130683026218257&w=2 - mark "82557/8/9/0/1 Ethernet Pro 100" in nicintel.c as working http://www.flashrom.org/pipermail/flashrom/2011-August/007480.html - rename some chips that had gratuitous "probing" suffixes: - SST25VF010.REMS - SST25VF040.REMS - M25P05.RES - M25P10.RES some other chip names with suffixes are needed due to lack of support for multiple probe functions per chip. this is explained here: http://www.flashrom.org/pipermail/flashrom/2011-August/007597.html - remove unneeded nicintel_spi-related function declarations in programmer.h - typos and whitespace fixes - fix Asus P4P800-E Deluxe detection The original board enable was added before DMI matching and used the IDs of a Promise controller as secondary PCI ID set. The controller could be disabled in the BIOS which would make the board not match. This patch uses the SMBus controller instead and adds a DMI pattern. This was Tested-by: Michael Schneider <vdrportal_midas at gmx dot de> Corresponding to flashrom svn r1425. - add "Sealed-case PC" to the list of chassis type (as indicating "not a laptop") This is Acked-by: Idwer Vollering <vidwer@gmail.com> the fix for the typo unusued -> unused is Signed-off-by: Sylvain "ythier" Hitier <sylvain.hitier@gmail.com> everything else is Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> And everything was reviewed and Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Fix printing of the Boot BIOS Straps on Intel chipsetsStefan Tauner2011-08-271-48/+81
| | | | | | | | | | | | | | | | | | | | | | | | The meaning of the bits involved has changed several times in the past. This patch takes these changes into account and hence fixes the output of the pretty printing of GCS on all SPI-supported Intel chipsets that are not ICH7 or NM10 (the latter were unaffected, because the defaults were correct). This patch also allows to differentiate Ibex Peak and Cougar Point chipsets from the earlier chipset series (ICH10) by adding new wrapper functions that set "ich_generation" to 11 and 12 respectively. This should not change behavior outside of enable_flash_ich_dc_spi, because the code path for ich_generation >=9 is equal. alternatively we could just remove the pretty printing of GCS and just output the bits involved. i would like to keep the pch differentiation anyway though, because i feel it will become handy in the future. tested on my QS57-based thinkpad (probe + partial read) Corresponding to flashrom svn r1423. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add AMD Hudson chipset-enableWang Qing Pei2011-08-261-0/+1
| | | | | | | | | | AMD Hudson has different vendor/device IDs than AMD SBx00, handle that properly. Corresponding to flashrom svn r1422. Signed-off-by: Wang Qing Pei <wangqingpei@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Fixup of r1397Carl-Daniel Hailfinger2011-08-151-2/+3
| | | | | | | | | | | | | | - Mixing uninitialized and initialized local variables leads to confusion. - ft2232_spi error cases should have gotten some error handling, and that's the reason the curly braces were there. - Fixing typos/wording in some places would have been nice given that those places were touched anyway. Corresponding to flashrom svn r1413. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add a board enable for ASUS A8M2N-LA (HP OEM "NodusM3-GL8E")Stefan Tauner2011-08-071-1/+1
| | | | | | | | | | | It is based on Joshua Roys' RE. http://www.flashrom.org/pipermail/flashrom/2011-August/007504.html Corresponding to flashrom svn r1408. Tested-by: Márton Miklós Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Clear byte 0x92 of the LPC bridge for all CK804 (and MCP51) chipsetsJonathan Kollasch2011-08-061-0/+6
| | | | | | | | | | | | | | | | | | | | | | | The OEM BIOS on the EPoX EP-8PA7I and a number of other boards clear byte 0x92 in the LPC bridge configuration space. Do the same for all CK804 chips, assuming this to be some sort of chipset-generic write-enable. Currently the same chipset enable is used for MCP51 (nForce 430). There have been reports of successful writes with its variations (e.g. A8N-LA (Nagami-GL8E)), but they were not tagged as OK. Due to the new "unsupported chipset"-message we will get success reports in the case this patch does not break anything on the MCP51-based boards. See also: http://www.flashrom.org/pipermail/flashrom/2011-July/007252.html http://patchwork.coreboot.org/patch/3176/ Corresponding to flashrom svn r1405. Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net> Acked-by: Joshua Roys <roysjosh@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Rephrase warnings in chipset_enable.cStefan Tauner2011-08-041-22/+22
| | | | | | | Corresponding to flashrom svn r1403. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Random whitespace and coding-style fixesUwe Hermann2011-07-281-83/+92
| | | | | | | | | | | | Also, indentation fixes, e.g. due to conversion to msg_*, use ARRAY_SIZE where possible, wrap overly long line, etc. Compile-tested. There should be no functional changes. Corresponding to flashrom svn r1397. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Rename CHIP_BUSTYPE_FOO to BUS_FOOCarl-Daniel Hailfinger2011-07-271-12/+12
| | | | | | | | | It's shorter to type, and we have less problems with the 80 column limit. Corresponding to flashrom svn r1396. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Fix ICH FWH IDSEL setting with the fwh_idsel= internal programmer parameterCarl-Daniel Hailfinger2011-07-251-7/+27
| | | | | | | | | | | The code took 32 bits of input and wrote them to an 48 bit register, duplicating some values. Document the fwh_idsel= parameter in the man page. Corresponding to flashrom svn r1389. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add a bunch of new/tested stuff and various small changes 5Stefan Tauner2011-07-251-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - mark EN25F80 as fully tested http://www.flashrom.org/pipermail/flashrom/2011-July/007329.html - mark W25Q16 as fully tested http://www.flashrom.org/pipermail/flashrom/2011-July/007151.html - mark W39V040A as fully tested http://www.flashrom.org/pipermail/flashrom/2011-July/007161.html - mark Pm25LV040 as fully tested reported by TL1 on IRC - mark W49F002U/N as fully tested http://paste.flashrom.org/view.php?id=733g - mark W39V080FA as fully tested http://www.flashrom.org/pipermail/flashrom/2011-July/007225.html - add ASUS P4S533-X to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-July/007200.html - add ASUS M4A785TD-V EVO to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-July/007329.html - add GA-945PL-S3P (rev. 6.6) to the list of supported boards reported by TL1 on IRC - add MS-7142 (K8MM-V) to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-July/007161.html - add MS-7369 (K9N Neo V2) to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-July/007181.html - add X7DBT-INF to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-July/007225.html - mark SiS 645DX chipset enable as OK http://www.flashrom.org/pipermail/flashrom/2011-July/007200.html - mark SiS 651 chipset enable as OK http://paste.flashrom.org/view.php?id=733 - move intel_ich_gpio34_raise to the correct line(s) - change the output of unlock_w39_fwh_block from 0x%x to 0x%08x - fix output for untested chipset enables (missing space) - reorder the board enable in print.c entry for GA-8SIMLH added in r1385. - minor other fixes - fix output for multiple found flash chips by adding quotes and commas - similarly fix output of "Found/Assuming" chips Corresponding to flashrom svn r1386. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> the last two points are Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> everything else is Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* chipset_enable.c: add a message for untested chipset enablesStefan Tauner2011-07-211-5/+14
| | | | | | | | | | | | | | | | | | | | | | | | | Old output: Calibrating delay loop... OK. Found chipset "Intel QS57", enabling flash write... OK. This chipset supports the following protocols: FWH, SPI. new non-verbose output for tested chipsets: Calibrating delay loop... OK. Found chipset "Intel QS57". Enabling flash write... OK. This chipset supports the following protocols: FWH, SPI. new non-verbose output for untested chipsets: Found chipset "Intel QS57". This chipset is marked as untested. If you are using an up-to-date version of flashrom please email a report to flashrom@flashrom.org including a verbose (-V) log. Enabling flash write... OK. This chipset supports the following protocols: FWH, SPI. Corresponding to flashrom svn r1379. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Enable writing on mcp6x_7xStefan Tauner2011-07-131-2/+3
| | | | | | | | | This was deliberately disabled until now, but seems to work well enough. Corresponding to flashrom svn r1372. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Fix memleaks due to incorrect usage of flashbuses_to_textStefan Tauner2011-06-261-2/+4
| | | | | | | Corresponding to flashrom svn r1357. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add intel 6 series pci ids to chipset_enablesStefan Tauner2011-06-181-0/+15
| | | | | | | | | | As defined by Intel 6 Series Chipset and Intel C200 Series Chipset Specification Update; document number 324646-006, May 2011. Corresponding to flashrom svn r1344. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Fix and add a few chipset_enables entriesIdwer Vollering2011-06-181-5/+10
| | | | | | | | Corresponding to flashrom svn r1343. Signed-off-by: Idwer Vollering <vidwer@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Resort chipset_enables array by pci idsIdwer Vollering2011-06-181-105/+105
| | | | | | | | Corresponding to flashrom svn r1342. Signed-off-by: Idwer Vollering <vidwer@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add a bunch of new/tested motherboards, board/chipset enables and flash ↵Stefan Tauner2011-06-121-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | chips etc. 3 - mark AT25DF321 as fully tested http://www.flashrom.org/pipermail/flashrom/attachments/20110527/01f1868b/attachment-0001.log - mark 82802AB as fully tested http://www.flashrom.org/pipermail/flashrom/2011-April/006145.html - mark Pm49FL002 as fully tested http://pastebin.com/pb5NTCmW - add Supermicro X8DT3 to boards_known http://www.flashrom.org/pipermail/flashrom/attachments/20110527/01f1868b/attachment-0001.log - add Supermicro X5DP8-G2 to boards_known http://www.flashrom.org/pipermail/flashrom/2011-April/006145.html - add Supermicro X8SIE as NOT WORKING to boards_known http://www.flashrom.org/pipermail/flashrom/2011-May/006554.html - add a DMI search pattern for the ASUS A8N-SLI Deluxe board enable to mitigate misdetections http://www.flashrom.org/pipermail/flashrom/2010-August/004379.html http://www.flashrom.org/pipermail/flashrom/2011-May/006570.html also, fix some random white space errors and comments/strings Corresponding to flashrom svn r1335. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* enable_flash_ich: warn if SMM BIOS Write Protection is detected in BIOS_CNTLStefan Tauner2011-06-111-1/+10
| | | | | | | Corresponding to flashrom svn r1332. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add a bunch of new/tested motherboards, board/chipset enables and flash chips 2Stefan Tauner2011-06-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | - mark chipset enable for QS57 as OK (my thinkpad) - mark MSI G31M3-L(S) V2 (MS-7529) as OK http://www.flashrom.org/pipermail/flashrom/2011-June/006634.html - mark AT49BV512 as fully tested http://www.flashrom.org/pipermail/flashrom/2011-June/006609.html - mark MX25L4005 as fully tested http://www.flashrom.org/pipermail/flashrom/2011-June/006634.html - mark SST49LF020 as fully tested http://www.flashrom.org/pipermail/flashrom/2011-May/006570.html - mark SST25VF064C as fully tested http://www.flashrom.org/pipermail/flashrom/2011-May/006586.html - mark W25x16 as fully tested http://www.flashrom.org/pipermail/flashrom/2011-June/006605.html Corresponding to flashrom svn r1324. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Whitespace, documentation and other small stuffStefan Tauner2011-05-191-2/+2
| | | | | | | | | | | | | This patch combines three previously posted patches in a revised form. one is even stolen from Stefan Reinauer (remove umlauts from man page). Corresponding to flashrom svn r1317. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Signed-off-by: Stefan Reinauer <reinauer@google.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add support for the Via VX855 chipsetJohn Schmerge2011-05-051-0/+1
| | | | | | | Corresponding to flashrom svn r1295. Signed-off-by: John Schmerge <jbschmerge@gmail.com> for Devon IT Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* List AMD SB850 as supported (it has the same PCI ID as SB700)Stefan Tauner2011-04-021-1/+1
| | | | | | | | | | Success report at http://flashrom.org/pipermail/flashrom/2011-March/006072.html Corresponding to flashrom svn r1285. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Idwer Vollering <vidwer@gmail.com>
* Fix typo in chipset_enable.cStefan Reinauer2011-03-291-1/+1
| | | | | | | Corresponding to flashrom svn r1283. Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Idwer Vollering <vidwer@gmail.com>
* Fix sparse warning: Using plain integer as NULL pointerPeter Huewe2011-01-241-1/+1
| | | | | | | | | | | This patch fixes the "using plain integer as NULL pointer" warnings generated by running sparse on the flashrom source. Corresponding to flashrom svn r1255. Signed-off-by: Peter Huewe <peterhuewe@gmx.de> Acked-by: Mathias Krause <mathias.krause@secunet.com> Acked-by: Stefan Reinauer <stepan@coreboot.org>
* Fix decoding of SB600 LPC ROM protection registersMathias Krause2011-01-011-6/+6
| | | | | | | | | | The address part was using a bit of the size, the size was missing the upper bit, was off by 1023 bytes and included the protection bits. Corresponding to flashrom svn r1250. Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Revert PCI config space writes on shutdownCarl-Daniel Hailfinger2010-11-101-45/+33
| | | | | | | | | | | | | | | This means all chipset enables etc. will be undone on shutdown. Reversible PCI config space writes now use rpci_write_*(). PCI config space writes which are one-shot (e.g. communication via config space) should continue to use the permanent pci_write_* variants. Extend the number of available register_shutdown slots to 32. Corresponding to flashrom svn r1232. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Refine text of requests to send logsPaul Menzel2010-10-081-3/+8
| | | | | | | | | | | A lot of messages sent@flashrom.org just have "flashrom -V" as the subject. Ask people to include more information in the subject line to make life easier for developers/supporters. Corresponding to flashrom svn r1202. Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Remove duplicate includes from the codeStefan Reinauer2010-10-061-1/+0
| | | | | | | Corresponding to flashrom svn r1196. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add a board-enable for the ASRock K7S41, chipset-enable for SiS 741Uwe Hermann2010-10-051-0/+1
| | | | | | | | | | | | | | This also adds (and marks as tested) a chipset-enable for the SiS 741. All operations successfully tested on hardware. lspci/superiotool: http://www.flashrom.org/pipermail/flashrom/2010-September/004710.html Corresponding to flashrom svn r1192. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add chipset enable for Broadcom OSB4Joshua Roys2010-09-151-0/+18
| | | | | | | | | No docs available. Corresponding to flashrom svn r1174. Signed-off-by: Joshua Roys <roysjosh@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add a board enable for MSI MS-6561 (745 Ultra)Mattias Mattsson2010-09-111-1/+1
| | | | | | | | | | | | | | | | SiS 745 chipset + Winbond W83697HF and Winbond W49F002U flash. Probe, read, erase and write all work. Matching on "NB/SB" (they are integrated). Also mark SiS 745 chipset as tested. lspci/superiotool: http://www.flashrom.org/pipermail/flashrom/2010-September/004705.html Corresponding to flashrom svn r1158. Signed-off-by: Mattias Mattsson <vitplister@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for Intel 5 Series / 3400 Series chipsetsHelge Wagner2010-08-111-0/+14
| | | | | | | | | | | (At least) for the QM57 which i have tested an additional patch was needed as some reserved bits in the "Software Sequencing Flash Control Register" (SSFC) needs to be programmed to 1 in the QM57. Corresponding to flashrom svn r1137. Signed-off-by: Helge Wagner <helge.wagner@ge.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Various cosmetic and coding-style fixesUwe Hermann2010-08-081-3/+3
| | | | | | | | | | | | | | | | | | | | | - Fix incorrect whitespace, indentation, and coding style in some places. - Drop '/**' Doxygen comments, we don't use Doxygen. Even if we would use it, the comments are useless as we don't have any Doxygen markup in there. - Use consistent vendor name spelling as per current website (NVIDIA, abit, GIGABYTE). - Use consistent / common format for "Suited for:" lines in board_enable.c. - Add some missing 'void's in functions taking no arguments. - Add missing fullstops in sentences, remove them from non-sentences (lists). Corresponding to flashrom svn r1134. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for SIS661 (SIS963)David Borg2010-07-311-0/+1
| | | | | | | | | Tested on Asus P4S800-MX. Corresponding to flashrom svn r1128. Signed-off-by: David Borg <borg.db@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add Nvidia nForce MCP61/MCP65/MCP67/MCP78S/MCP73/MCP79 SPI flashing supportCarl-Daniel Hailfinger2010-07-281-146/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Huge thanks go to Michael Karcher for reverse engineering the interface and to Johannes Sjölund for testing the first iterations of my patch on his hardware until it worked. Thanks to the following testers of the patch: * MCP61, 10de:03e0, LPC OK, ECS Geforce6100SM-M, Andrew Cleveland * MCP61, 10de:03e0, LPC OK, Biostar NF520-A2 NF61D-A2, Vitaliy Buchynskyy * MCP65, 10de:0441, SPI OK, MSI MS-7369 K9N Neo-F v2, Kjell Braden * MCP65, 10de:0441, SPI OK, MSI MS-7369, Wolfgang Schnitker * MCP65, 10de:0441, SPI OK, MSI MS-7369, Johannes Sjölund * MCP65, 10de:0441, SPI OK, MSI MS-7369, Melchior Franz * MCP78S, 10de:075c, SPI OK, Asus M3N78 PRO, Brad Rogers * MCP78S, 10de:075c, SPI OK, Asus M3N78-VM, Marcel Partap * MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Kimmo Vuorinen * MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Vikram Ambrose * MCP79, 10de:0aad, SPI OK, Acer Aspire R3600, Andrew Morgan * MCP79, 10de:0aae, LPC ??, Lenovo Ideapad S12 laptop, Christian Schmitt * MCP79, 10de:0aae, SPI OK, Apple iMac9,1 Mac-F2218EA9, David "dledson" flashrom will refuse to write/erase for safety reasons if MCP6x/MCP7x SPI is detected. Corresponding to flashrom svn r1113. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Split off programmer.h from flash.hCarl-Daniel Hailfinger2010-07-271-0/+1
| | | | | | | | | | | | | | | | | | | | | Programmer specific functions are of absolutely no interest to any file except those dealing with programmer specific actions (special SPI commands and the generic core). The new header structure is as follows (and yes, improvements are possible): flashchips.h flash chip IDs chipdrivers.h chip-specific read/write/... functions flash.h common header for all stuff that doesn't fit elsewhere hwaccess.h hardware access functions programmer.h programmer specific functions coreboot_tables.h header from coreboot, internal programmer only spi.h SPI command definitions Corresponding to flashrom svn r1112. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Convert MMIO accesses of non-internal PCI-based programmers to be ↵Carl-Daniel Hailfinger2010-07-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | endian-agnostic Convert all PCI-based external programmers to use special little-endian accessors for all MMIO regions of PCI devices. This patch does _not_ touch the internal programmer (which is PCI-based as well). Huge thanks go to Misha Manulis who worked with me to create a first version of this patch for the satasii programmer based on modification of generic code. Huge thanks also go to Segher Boessenkool for suggesting the pci_mmio_ prefix for the abstraction layer. NOTE to package maintainers: With this patch, compilation and usage of flashrom should be safe on x86, x86_64, MIPS (little and big endian) and PowerPC (big endian). The internal programmer is disabled on non-x86/x86_64 (but it compiles). The atahpt, nic3com, nicnatsemi, nicrealtek and rayer_spi can not be compiled on non-x86/x86_64 because port space I/O is not (yet) supported. Please compile with default settings on x86/x86_64 and with the following settings on all other architectures: make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no CONFIG_NICNATSEMI=no CONFIG_RAYER_SPI=no Corresponding to flashrom svn r1111. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Misha Manulis <misha@manulis.com>
* Move SB600 SPI initialization to sb600spi.cMichael Karcher2010-07-221-77/+5
| | | | | | | Corresponding to flashrom svn r1099. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Move Intel SPI initialisation to ichspi.cMichael Karcher2010-07-221-200/+18
| | | | | | | | | | | Smarter version could decide whether SPI is vital or not depending on straps. Straps are currently implemented for ICH7. EP80579 is in the comment, PCH of 5 Series/3400 Series has "LPC, reserved, PCI, SPI". Corresponding to flashrom svn r1098. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Fix out-of-bounds ICH FREG permission printingCarl-Daniel Hailfinger2010-07-131-3/+4
| | | | | | | | | | | | | | A bit was masked, but not shifted, and that led to worst-case accesses of index 24 in an array with 4 members. I've improved readability in the variable declaration block as well. Thanks to Stephen Kou for reporting the bug. Corresponding to flashrom svn r1076. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stephen Kou <stephen@hyarros.com>
* Unify programmer parameter extractionCarl-Daniel Hailfinger2010-07-081-1/+1
| | | | | | | | | | | Make programmer_param static by converting all users to extract_programmer_param. Programmer parameters can no longer be separated with a colon, they have to be separated with a comma. Corresponding to flashrom svn r1072. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Various places in the flashrom source feature custom parameter extraction ↵Carl-Daniel Hailfinger2010-07-061-5/+10
| | | | | | | | | | | | | | | | | | | | from programmer_param This led to wildly differing syntax for programmer parameters, and it also voids pretty much every assumption you could make about programmer_param. The latter is a problem for libflashrom. Use extract_param everywhere, clean up related code and make it more foolproof. Add two instances of exit(1) where we have no option to return an error. Remove six instances of exit(1) where returning an error was possible. WARNING: This changes programmer parameter syntax for a few programmers! Corresponding to flashrom svn r1070. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Kill global variables, constants and functions if local scope sufficesCarl-Daniel Hailfinger2010-07-031-30/+30
| | | | | | | | | | | | | | | | | | | | | | | Constify variables where possible. Initialize programmer-related variables explicitly in programmer_init to allow running programmer_init from a clean state after programmer_shutdown. Prohibit registering programmer shutdown functions before init or after shutdown. Kill some dead code. Rename global variables with namespace-polluting names. Use a previously unused locking helper function in sst49lfxxxc.c. This is needed for libflashrom. Effects on the binary size of flashrom are minimal (300 bytes shrinkage), but the data section shrinks by 4384 bytes, and that's a good thing if flashrom is operating in constrained envionments. Corresponding to flashrom svn r1068. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
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