| Commit message (Collapse) | Author | Age | Files | Lines |
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This code was originally introduced by ITE for now exceedingly old
Chromebooks. The code has had very little attention to maintain it,
unlikely tested for a long time and now seems to be just a technical
burden to the flashrom project.
If someone is later interested it could be resurrected for reference
from git history. However, it needs quite a bit of work to bring it back
into maintainable order.
BUG=b:156143896,b:170689483
TEST=tree builds under meson+make and unit tests pass.
Change-Id: I5e8cafd73db837941c518f0e2d72d8192274fd79
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/65378
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Just a trivial patch to fix a few errors found by codespell.
Here's the command I used:
codespell -S subprojects,out \
-L fwe,dout,tast,crate,parms,claus,nt,nd,te,truns,trun
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I4e3b277f220fa70dcab21912c30f1d26d9bd8749
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62840
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Drop not needed `-DCONFIG_BITBANG_SPI=1`
Change-Id: I2a519c929f7747af70568284823b51678751e285
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/63886
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Move all header files to the new `include` directory.
Adapt include directives and build systems to the new directory.
Change-Id: Iaddd6bbfa0624b166d422f665877f096983bf4cf
Signed-off-by: Felix Singer <felix.singer@secunet.com>
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58622
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
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STANDALONE mode was used to build flashrom without having support for
file handling. This was relevant to build libflashrom on top of
libpayload. For a while now, the code which is covered by STANDALONE has
moved to cli_*.c and is not used for libflashrom. Therefore we can drop
STANDALONE mode.
Change-Id: I58fb82270a9884a323d9850176708d230fdc5165
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/63469
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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The NEED_PCI macro is only used to guard prototypes. This is not needed.
Change-Id: I6895b795bc96b3e251700bff4b0054407aac789a
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62834
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Add functions like
`uint32_t read_le32(const void *base, size_t offset);`
Read a 32 bit unsigned from a base with an offset.
Having prototypes and a macro generated implementation makes it easier
to read, understand and spot errors in one of them.
Change-Id: Idde177acf8bc5f94cd046b6539dc31532c98e452
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/31016
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Starting to move the platform dependent code to platform/ and provide
the abstraction through the platform.h header.
Change-Id: I35640282d451960f2a329ae24339ec05dbae6d30
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62899
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Split the code for endian conversion into separate files for big and
little endian. The buildsystem selects the correct file for the used
endianness. Replace the swab macros with `static inline` c functions.
Define macros for returning the same or swapped value. Call those macros
in the endian specific files.
Change-Id: I86d38d816b37c283279c485fac8027f8fb94364a
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62898
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Move all function implementations into the .c file
TEST: `[g]make [WARNERROR=no]` on Linux, FreeBSD, NetBSD, OpenBSD,
DragonflyBSD, OpenIndiana, Debian-GNU/Hurd
Change-Id: I1400704e9ac5fed00c096796536108d5bfb875e3
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61276
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Align the usage of serial function with the selection of other
dependencies.
Change-Id: Ica951e76d6362b01f09d23a729a2a6049e7f0b66
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62196
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Change-Id: I1a846acfd8d2e0a9fc8b02c078b6ac0342438490
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62199
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Change-Id: Ib0091a23611cd5a1d915e56c6d0f061d74198e88
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62198
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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The Mediatek i2c spi driver requires the linux i2c stack.
Change-Id: Ic90048c549fecb8c051750a92c5b35403f07fbf4
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62217
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Change-Id: I47acdf89a369441b9fc664352c27c43b461545b1
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62197
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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Allow chips to specify functions that map status register bits to
protection ranges. These are used to enumerate available ranges and
determine the protection state of chips. The patch also adds a range
decoding function for the example chips. Many other chips can also be
handled by it, though some will require different functions (e.g.
MX25L6406 and related chips).
Another approach that has been tried in cros flashrom is maintaining
tables of range data, but it quickly becomes error prone and hard to
validate.
Using a function to interpret the ranges allows compact encoding with
most chips and is flexible enough to allow chips with less predictable
ranges to be handled as well.
BUG=b:195381327,b:153800563
BRANCH=none
TEST=dumped range tables, checked against datasheets
Change-Id: Id163ed80938a946a502ed116e48e8236e36eb203
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58480
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
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Use a conditional function for the statement. This limits the decision
to one line instead of multiple places.
Change-Id: Iee66dbc609bd5c6eb9d04b457f4508911b2e6560
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62195
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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The internal programmer has platform independent code for x86 and linux
based code for mipsel. Furthermore the internal programmer can call the
linux mtd programmer when available.
Enable the internal programmer on x86 or linux.
Change-Id: Ia607ea60c3d7d15fe231fa412595992dadc535ad
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61300
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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All CPPFLAGS and LDFLAGS for dependencies are handled by pkg-config
Change-Id: Ib7c11a0c8a7918562256480c4be0c95355f981c5
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61526
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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The --static flag of pkg-config returns also the LDFLAGS which are
required to link the library static. Use this flag to successfully
link against static libraries when the shared variant is not available.
This is the case in OpenBSD with libpci.
Change-Id: I6029a096c1ceca625789d18c88119d912d79bc0e
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61524
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Some systems, e.g. OpenBSD, have clock_gettime / librt build into the
libc and therefore fail to link against it with -lrt. Thus, detect this
and link only if needed.
Change-Id: I2c1668a350aa0806fccfb4e9cd8b04861f085ee9
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61523
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Add a spi_master interface supporting MediaTek MST9U ISP mode.
Autodetect the bus type via I2C_FUNC_I2C, and use the appropriate
read/write commands, in case the MST9U is attached to smbus.
TEST=Successfully programmed SPI on test hardware.
Change-Id: I24adb14e7b4f7160e1c3ff941774064d5a81e820
Signed-off-by: Neill Corlett <corlett@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61288
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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distclean removes .libdeps which does not exist anymore
Change-Id: I7d5717b99bf44a610a77177662c208da7f58c9e7
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59233
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Change-Id: I819f5d76e6f37a0e0ed6481a051ed85126622503
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59231
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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These targets are all called together. No need to have them individual.
Change-Id: Ic76f923bca2beb6f95b8ea0cced4569b07e9b9ba
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60107
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Use the order in which the targets get executed.
Change-Id: Ic45c2fc98c679ac7be4ee2860d72b517b8b67a17
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60836
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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- replace $(LIBS) by $(LDFLAGS)
- use override to handle CPPFLAGS, CFLAGS, LDFLAGS
This allows to append flags to the users input.
- remove unused $(DIFF)
Change-Id: I1c9e869377677d624469af1ee9ece9a28fc3b559
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59230
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
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Use `make HAS_LIBPCI=yes/no` to override the pkg-config detection and
`CONFIG_LIBPCI_CFLAGS` and `CONFIG_LIBPCI_LDFLAGS` to set cflags and
ldflags manually. The optional dependency of libpci libz, is
automatically handled by pkg-config.
Change-Id: I21b4a261b34b7e688635fc6e20b7beebfa64c7ed
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59050
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
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Let programmer only depend on the kind of hardware access method they
really need. Libpci no longer depends on all hardware access types since
each programmer handles this individually.
Change-Id: I5bdafaa3c5023ad6c4a695493eeddf11bc148085
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60325
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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The mmio_le/be_read/writex functions are used for raw memory access.
Bundle them with the physmap functions.
Change-Id: I313062b078e89630c703038866ac93c651f0f49a
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61160
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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The satasii programmer does not use x86 IO Ports. Remove the dependency
to it.
Change-Id: I54d65561ff024d3c181d11c6518a4612c2ab0399
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60848
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The ogp_spi programmer does not use x86 IO Ports. Remove the dependency
to it.
Change-Id: I1f3f34e33f77159fa0cdea150e1f408ce9d943f0
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60847
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The nicintel_spi programmer does not use x86 IO Ports. Remove the
dependency to it.
Change-Id: I3e7451eceb1f01de21da934c9559dbf2f06e7e54
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60846
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The nicintel_eeprom programmer does not use x86 IO Ports. Remove the
dependency to it.
Change-Id: I5fd42572fd29f5d7fd749c2836eac3e68c947946
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60845
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The nicintel programmer does not use x86 IO Ports. Remove the dependency
to it.
Change-Id: Ibe609ff8f8fdbdf2a7de8e1922325ca4ad56a9e7
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60844
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The gfxnvidia programmer does not use x86 IO Ports. Remove the
dependency to it.
Change-Id: I1f0341390ccb698bc435760f4ead7de54e429a6e
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60843
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The drkaiser programmer does not use x86 IO Ports. Remove the dependency
to it.
Change-Id: I86bad947298a1166ff1e768f7d0b75a90e574696
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60842
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The atavia programmer does not use x86 IO Ports. Remove the dependency
to it.
Change-Id: I1fa866b3b07adf5f7a51d58f53d6cad1f88d7210
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60841
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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List all programmers which depend on the respective hwaccess features.
This is the base for a precise feature selecting in the build system.
Change-Id: I588f698780b5acd65084346bcef781cbfd1203ea
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60114
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Line up physmap with the other hwaccess related code.
Change-Id: Ieba6f4e94cfc3e668fcb8b3c978de5908aed2592
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60113
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Allow x86 msr related code to be compiled independent from memory
mapping functionality. This enables for a better selection of needed
hardware access types.
Change-Id: Idc9ce9df3ea1e291ad469de59467646b294119c4
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60111
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Allow port I/O related code to be compiled independent from memory
mapping functionality. This enables for a better selection of needed
hardware access types.
Change-Id: I372b4a409f036da766c42bc406b596bc41b0f75a
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60110
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Use `make HAS_LIBUSB1=yes/no` to override the pkg-config detection and
`CONFIG_LIBUSB1_CFLAGS` and `CONFIG_LIBUSB1_LDFLAGS` to set cflags and
ldflags manually.
Change-Id: I4f24be647d25dde24c41514f8964b7134205867c
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59049
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Use `make HAS_LIBJAYLINK=yes/no` to override the pkg-config detection
and `CONFIG_LIBJAYLINK_CFLAGS` and `CONFIG_LIBJAYLINK_LDFLAGS` to set
cflags and ldflags manually.
Change-Id: I99df547046bb9820ab502f89f6d4452c1bc0cfd4
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59048
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Since the NI-845x is a Windows only proprietary library, disable it by
default. Use `HAS_LIB_NI845X=yes` to enable it. The default search path
is `${PROGRAMFILES}\National Instruments\NI-845x\MS Visual C` and can be
overwritten by `CONFIG_NI845X_LIBRARY_PATH`. Use
`CONFIG_LIB_NI845X_CFLAGS` and `CONFIG_LIB_NI845X_LDFLAGS` for setting
the cflags and ld flags manually.
Change-Id: I918c3605a5ac168708a6a10fd92ee2a1aae9729b
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59047
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Use `make HAS_LIBFTDI1=yes/no` to override the pkg-config detection and
`CONFIG_LIBFTDI1_CFLAGS` and `CONFIG_LIBFTDI1_LDFLAGS` to set cflags and
ldflags manually.
Change-Id: I41f5186d9f3e063c12c8c6eea888d0b0bf534259
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58623
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Handle dependenies as part of the hwlibs target.
Change-Id: Ib1e817d1e5248af5797fbb14c864527db6ad570c
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58505
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Handle dependenies as part of the hwlibs target.
Change-Id: I3a5c5a584390eaf0c5ca169cc051e471f024f15d
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58504
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Clean up the feature target by outsourcing the test to an own variable.
Change the print output and don't write to the build-details file.
This is in preparation for further changes.
Change-Id: I18fc27252afb49fa7d1f2787faee2b5b669275aa
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58627
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Clean up the feature target by outsourcing the test to an own variable.
Change the print output and don't write to the build-details file.
HAS_CLOCK_GETTIME=no replaces DISABLE_CLOCK_GETTIME=yes
This is in preparation for further changes.
Change-Id: Ie1f43b3d5a8ad79bff3f9bbc21f359ec35abc42a
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58618
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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