1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
|
/**CFile****************************************************************
FileName [abcIvy.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Network and node package.]
Synopsis [Strashing of the current network.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: abcIvy.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "abc.h"
#include "dec.h"
#include "ivy.h"
#include "fraig.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
static Abc_Ntk_t * Abc_NtkFromIvy( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan );
static Abc_Ntk_t * Abc_NtkFromIvySeq( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan, int fHaig );
static Ivy_Man_t * Abc_NtkToIvy( Abc_Ntk_t * pNtkOld );
static void Abc_NtkStrashPerformAig( Abc_Ntk_t * pNtk, Ivy_Man_t * pMan );
static Ivy_Obj_t * Abc_NodeStrashAig( Ivy_Man_t * pMan, Abc_Obj_t * pNode );
static Ivy_Obj_t * Abc_NodeStrashAigSopAig( Ivy_Man_t * pMan, Abc_Obj_t * pNode, char * pSop );
static Ivy_Obj_t * Abc_NodeStrashAigExorAig( Ivy_Man_t * pMan, Abc_Obj_t * pNode, char * pSop );
static Ivy_Obj_t * Abc_NodeStrashAigFactorAig( Ivy_Man_t * pMan, Abc_Obj_t * pNode, char * pSop );
extern char * Mio_GateReadSop( void * pGate );
typedef int Abc_Edge_t;
static inline Abc_Edge_t Abc_EdgeCreate( int Id, int fCompl ) { return (Id << 1) | fCompl; }
static inline int Abc_EdgeId( Abc_Edge_t Edge ) { return Edge >> 1; }
static inline int Abc_EdgeIsComplement( Abc_Edge_t Edge ) { return Edge & 1; }
static inline Abc_Edge_t Abc_EdgeRegular( Abc_Edge_t Edge ) { return (Edge >> 1) << 1; }
static inline Abc_Edge_t Abc_EdgeNot( Abc_Edge_t Edge ) { return Edge ^ 1; }
static inline Abc_Edge_t Abc_EdgeNotCond( Abc_Edge_t Edge, int fCond ) { return Edge ^ fCond; }
static inline Abc_Edge_t Abc_EdgeFromNode( Abc_Obj_t * pNode ) { return Abc_EdgeCreate( Abc_ObjRegular(pNode)->Id, Abc_ObjIsComplement(pNode) ); }
static inline Abc_Obj_t * Abc_EdgeToNode( Abc_Ntk_t * p, Abc_Edge_t Edge ) { return Abc_ObjNotCond( Abc_NtkObj(p, Abc_EdgeId(Edge)), Abc_EdgeIsComplement(Edge) ); }
static inline Abc_Obj_t * Abc_ObjFanin0Ivy( Abc_Ntk_t * p, Ivy_Obj_t * pObj ) { return Abc_ObjNotCond( Abc_EdgeToNode(p, Ivy_ObjFanin0(pObj)->TravId), Ivy_ObjFaninC0(pObj) ); }
static inline Abc_Obj_t * Abc_ObjFanin1Ivy( Abc_Ntk_t * p, Ivy_Obj_t * pObj ) { return Abc_ObjNotCond( Abc_EdgeToNode(p, Ivy_ObjFanin1(pObj)->TravId), Ivy_ObjFaninC1(pObj) ); }
static Vec_Int_t * Abc_NtkCollectLatchValuesIvy( Abc_Ntk_t * pNtk, int fUseDcs );
extern int timeRetime;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Prepares the IVY package.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Ivy_Man_t * Abc_NtkIvyBefore( Abc_Ntk_t * pNtk, int fSeq, int fUseDc )
{
Ivy_Man_t * pMan;
//timeRetime = clock();
assert( !Abc_NtkIsNetlist(pNtk) );
if ( Abc_NtkIsBddLogic(pNtk) )
{
if ( !Abc_NtkBddToSop(pNtk, 0) )
{
printf( "Abc_NtkIvyBefore(): Converting to SOPs has failed.\n" );
return NULL;
}
}
if ( fSeq && Abc_NtkCountSelfFeedLatches(pNtk) )
{
printf( "Warning: The network has %d self-feeding latches.\n", Abc_NtkCountSelfFeedLatches(pNtk) );
// return NULL;
}
// print warning about choice nodes
if ( Abc_NtkGetChoiceNum( pNtk ) )
printf( "Warning: The choice nodes in the initial AIG are removed by strashing.\n" );
// convert to the AIG manager
pMan = Abc_NtkToIvy( pNtk );
if ( !Ivy_ManCheck( pMan ) )
{
printf( "AIG check has failed.\n" );
Ivy_ManStop( pMan );
return NULL;
}
// Ivy_ManPrintStats( pMan );
if ( fSeq )
{
int nLatches = Abc_NtkLatchNum(pNtk);
Vec_Int_t * vInit = Abc_NtkCollectLatchValuesIvy( pNtk, fUseDc );
Ivy_ManMakeSeq( pMan, nLatches, vInit->pArray );
Vec_IntFree( vInit );
// Ivy_ManPrintStats( pMan );
}
//timeRetime = clock() - timeRetime;
return pMan;
}
/**Function*************************************************************
Synopsis [Prepares the IVY package.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkIvyAfter( Abc_Ntk_t * pNtk, Ivy_Man_t * pMan, int fSeq, int fHaig )
{
Abc_Ntk_t * pNtkAig;
int nNodes, fCleanup = 1;
// convert from the AIG manager
if ( fSeq )
pNtkAig = Abc_NtkFromIvySeq( pNtk, pMan, fHaig );
else
pNtkAig = Abc_NtkFromIvy( pNtk, pMan );
// report the cleanup results
if ( !fHaig && fCleanup && (nNodes = Abc_AigCleanup(pNtkAig->pManFunc)) )
printf( "Warning: AIG cleanup removed %d nodes (this is not a bug).\n", nNodes );
// duplicate EXDC
if ( pNtk->pExdc )
pNtkAig->pExdc = Abc_NtkDup( pNtk->pExdc );
// make sure everything is okay
if ( !Abc_NtkCheck( pNtkAig ) )
{
printf( "Abc_NtkStrash: The network check has failed.\n" );
Abc_NtkDelete( pNtkAig );
return NULL;
}
return pNtkAig;
}
/**Function*************************************************************
Synopsis [Gives the current ABC network to AIG manager for processing.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkIvyStrash( Abc_Ntk_t * pNtk )
{
Abc_Ntk_t * pNtkAig;
Ivy_Man_t * pMan;
pMan = Abc_NtkIvyBefore( pNtk, 1, 0 );
if ( pMan == NULL )
return NULL;
pNtkAig = Abc_NtkIvyAfter( pNtk, pMan, 1, 0 );
Ivy_ManStop( pMan );
return pNtkAig;
}
/**Function*************************************************************
Synopsis [Gives the current ABC network to AIG manager for processing.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkIvyHaig( Abc_Ntk_t * pNtk, int nIters, int fUseZeroCost, int fVerbose )
{
Abc_Ntk_t * pNtkAig;
Ivy_Man_t * pMan;
int clk;
// int i;
/*
extern int nMoves;
extern int nMovesS;
extern int nClauses;
extern int timeInv;
nMoves = 0;
nMovesS = 0;
nClauses = 0;
timeInv = 0;
*/
pMan = Abc_NtkIvyBefore( pNtk, 1, 1 );
if ( pMan == NULL )
return NULL;
//timeRetime = clock();
clk = clock();
Ivy_ManHaigStart( pMan, fVerbose );
// Ivy_ManRewriteSeq( pMan, 0, 0 );
// for ( i = 0; i < nIters; i++ )
// Ivy_ManRewriteSeq( pMan, fUseZeroCost, 0 );
//printf( "%d ", Ivy_ManNodeNum(pMan) );
Ivy_ManRewriteSeq( pMan, 0, 0 );
Ivy_ManRewriteSeq( pMan, 0, 0 );
Ivy_ManRewriteSeq( pMan, 1, 0 );
//printf( "%d ", Ivy_ManNodeNum(pMan) );
//printf( "%d ", Ivy_ManNodeNum(pMan->pHaig) );
//ABC_PRT( " ", clock() - clk );
//printf( "\n" );
/*
printf( "Moves = %d. ", nMoves );
printf( "MovesS = %d. ", nMovesS );
printf( "Clauses = %d. ", nClauses );
ABC_PRT( "Time", timeInv );
*/
// Ivy_ManRewriteSeq( pMan, 1, 0 );
//printf( "Haig size = %d.\n", Ivy_ManNodeNum(pMan->pHaig) );
// Ivy_ManHaigPostprocess( pMan, fVerbose );
//timeRetime = clock() - timeRetime;
// write working AIG into the current network
// pNtkAig = Abc_NtkIvyAfter( pNtk, pMan, 1, 0 );
// write HAIG into the current network
pNtkAig = Abc_NtkIvyAfter( pNtk, pMan->pHaig, 1, 1 );
Ivy_ManHaigStop( pMan );
Ivy_ManStop( pMan );
return pNtkAig;
}
/**Function*************************************************************
Synopsis [Gives the current ABC network to AIG manager for processing.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkIvyCuts( Abc_Ntk_t * pNtk, int nInputs )
{
extern void Ivy_CutComputeAll( Ivy_Man_t * p, int nInputs );
Ivy_Man_t * pMan;
pMan = Abc_NtkIvyBefore( pNtk, 1, 0 );
if ( pMan == NULL )
return;
Ivy_CutComputeAll( pMan, nInputs );
Ivy_ManStop( pMan );
}
/**Function*************************************************************
Synopsis [Gives the current ABC network to AIG manager for processing.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkIvyRewrite( Abc_Ntk_t * pNtk, int fUpdateLevel, int fUseZeroCost, int fVerbose )
{
Abc_Ntk_t * pNtkAig;
Ivy_Man_t * pMan;
pMan = Abc_NtkIvyBefore( pNtk, 0, 0 );
if ( pMan == NULL )
return NULL;
//timeRetime = clock();
Ivy_ManRewritePre( pMan, fUpdateLevel, fUseZeroCost, fVerbose );
//timeRetime = clock() - timeRetime;
pNtkAig = Abc_NtkIvyAfter( pNtk, pMan, 0, 0 );
Ivy_ManStop( pMan );
return pNtkAig;
}
/**Function*************************************************************
Synopsis [Gives the current ABC network to AIG manager for processing.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkIvyRewriteSeq( Abc_Ntk_t * pNtk, int fUseZeroCost, int fVerbose )
{
Abc_Ntk_t * pNtkAig;
Ivy_Man_t * pMan;
pMan = Abc_NtkIvyBefore( pNtk, 1, 1 );
if ( pMan == NULL )
return NULL;
//timeRetime = clock();
Ivy_ManRewriteSeq( pMan, fUseZeroCost, fVerbose );
//timeRetime = clock() - timeRetime;
// Ivy_ManRewriteSeq( pMan, 1, 0 );
// Ivy_ManRewriteSeq( pMan, 1, 0 );
pNtkAig = Abc_NtkIvyAfter( pNtk, pMan, 1, 0 );
Ivy_ManStop( pMan );
return pNtkAig;
}
/**Function*************************************************************
Synopsis [Gives the current ABC network to AIG manager for processing.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkIvyResyn0( Abc_Ntk_t * pNtk, int fUpdateLevel, int fVerbose )
{
Abc_Ntk_t * pNtkAig;
Ivy_Man_t * pMan, * pTemp;
pMan = Abc_NtkIvyBefore( pNtk, 0, 0 );
if ( pMan == NULL )
return NULL;
pMan = Ivy_ManResyn0( pTemp = pMan, fUpdateLevel, fVerbose );
Ivy_ManStop( pTemp );
pNtkAig = Abc_NtkIvyAfter( pNtk, pMan, 0, 0 );
Ivy_ManStop( pMan );
return pNtkAig;
}
/**Function*************************************************************
Synopsis [Gives the current ABC network to AIG manager for processing.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkIvyResyn( Abc_Ntk_t * pNtk, int fUpdateLevel, int fVerbose )
{
Abc_Ntk_t * pNtkAig;
Ivy_Man_t * pMan, * pTemp;
pMan = Abc_NtkIvyBefore( pNtk, 0, 0 );
if ( pMan == NULL )
return NULL;
pMan = Ivy_ManResyn( pTemp = pMan, fUpdateLevel, fVerbose );
Ivy_ManStop( pTemp );
pNtkAig = Abc_NtkIvyAfter( pNtk, pMan, 0, 0 );
Ivy_ManStop( pMan );
return pNtkAig;
}
/**Function*************************************************************
Synopsis [Gives the current ABC network to AIG manager for processing.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkIvySat( Abc_Ntk_t * pNtk, int nConfLimit, int fVerbose )
{
Ivy_FraigParams_t Params, * pParams = &Params;
Abc_Ntk_t * pNtkAig;
Ivy_Man_t * pMan, * pTemp;
pMan = Abc_NtkIvyBefore( pNtk, 0, 0 );
if ( pMan == NULL )
return NULL;
Ivy_FraigParamsDefault( pParams );
pParams->nBTLimitMiter = nConfLimit;
pParams->fVerbose = fVerbose;
// pMan = Ivy_FraigPerform( pTemp = pMan, pParams );
pMan = Ivy_FraigMiter( pTemp = pMan, pParams );
Ivy_ManStop( pTemp );
pNtkAig = Abc_NtkIvyAfter( pNtk, pMan, 0, 0 );
Ivy_ManStop( pMan );
return pNtkAig;
}
/**Function*************************************************************
Synopsis [Sets the final nodes to point to the original nodes.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkTransferPointers( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNtkAig )
{
Abc_Obj_t * pObj;
Ivy_Obj_t * pObjIvy, * pObjFraig;
int i;
pObj = Abc_AigConst1(pNtk);
pObj->pCopy = Abc_AigConst1(pNtkAig);
Abc_NtkForEachCi( pNtk, pObj, i )
pObj->pCopy = Abc_NtkCi(pNtkAig, i);
Abc_NtkForEachCo( pNtk, pObj, i )
pObj->pCopy = Abc_NtkCo(pNtkAig, i);
Abc_NtkForEachLatch( pNtk, pObj, i )
pObj->pCopy = Abc_NtkBox(pNtkAig, i);
Abc_NtkForEachNode( pNtk, pObj, i )
{
pObjIvy = (Ivy_Obj_t *)pObj->pCopy;
if ( pObjIvy == NULL )
continue;
pObjFraig = Ivy_ObjEquiv( pObjIvy );
if ( pObjFraig == NULL )
continue;
pObj->pCopy = Abc_EdgeToNode( pNtkAig, Ivy_Regular(pObjFraig)->TravId );
pObj->pCopy = Abc_ObjNotCond( pObj->pCopy, Ivy_IsComplement(pObjFraig) );
}
}
/**Function*************************************************************
Synopsis [Gives the current ABC network to AIG manager for processing.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkIvyFraig( Abc_Ntk_t * pNtk, int nConfLimit, int fDoSparse, int fProve, int fTransfer, int fVerbose )
{
Ivy_FraigParams_t Params, * pParams = &Params;
Abc_Ntk_t * pNtkAig;
Ivy_Man_t * pMan, * pTemp;
pMan = Abc_NtkIvyBefore( pNtk, 0, 0 );
if ( pMan == NULL )
return NULL;
Ivy_FraigParamsDefault( pParams );
pParams->nBTLimitNode = nConfLimit;
pParams->fVerbose = fVerbose;
pParams->fProve = fProve;
pParams->fDoSparse = fDoSparse;
pMan = Ivy_FraigPerform( pTemp = pMan, pParams );
// transfer the pointers
if ( fTransfer == 1 )
{
Vec_Ptr_t * vCopies;
vCopies = Abc_NtkSaveCopy( pNtk );
pNtkAig = Abc_NtkIvyAfter( pNtk, pMan, 0, 0 );
Abc_NtkLoadCopy( pNtk, vCopies );
Vec_PtrFree( vCopies );
Abc_NtkTransferPointers( pNtk, pNtkAig );
}
else
pNtkAig = Abc_NtkIvyAfter( pNtk, pMan, 0, 0 );
Ivy_ManStop( pTemp );
Ivy_ManStop( pMan );
return pNtkAig;
}
/**Function*************************************************************
Synopsis [Gives the current ABC network to AIG manager for processing.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NtkIvyProve( Abc_Ntk_t ** ppNtk, void * pPars )
{
Prove_Params_t * pParams = pPars;
Abc_Ntk_t * pNtk = *ppNtk, * pNtkTemp;
Abc_Obj_t * pObj, * pFanin;
Ivy_Man_t * pMan;
int RetValue;
assert( Abc_NtkIsStrash(pNtk) || Abc_NtkIsLogic(pNtk) );
// experiment with various parameters settings
// pParams->fUseBdds = 1;
// pParams->fBddReorder = 1;
// pParams->nTotalBacktrackLimit = 10000;
// strash the network if it is not strashed already
if ( !Abc_NtkIsStrash(pNtk) )
{
pNtk = Abc_NtkStrash( pNtkTemp = pNtk, 0, 1, 0 );
Abc_NtkDelete( pNtkTemp );
}
// check the case when the 0000 simulation pattern detect the bug
pObj = Abc_NtkPo(pNtk,0);
pFanin = Abc_ObjFanin0(pObj);
if ( Abc_ObjFanin0(pObj)->fPhase != (unsigned)Abc_ObjFaninC0(pObj) )
{
pNtk->pModel = ABC_ALLOC( int, Abc_NtkPiNum(pNtk) );
memset( pNtk->pModel, 0, sizeof(int) * Abc_NtkPiNum(pNtk) );
return 0;
}
// if SAT only, solve without iteration
RetValue = Abc_NtkMiterSat( pNtk, 2*(ABC_INT64_T)pParams->nMiteringLimitStart, (ABC_INT64_T)0, 0, NULL, NULL );
if ( RetValue >= 0 )
return RetValue;
// apply AIG rewriting
if ( pParams->fUseRewriting && Abc_NtkNodeNum(pNtk) > 500 )
{
// int clk = clock();
//printf( "Before rwsat = %d. ", Abc_NtkNodeNum(pNtk) );
pParams->fUseRewriting = 0;
pNtk = Abc_NtkBalance( pNtkTemp = pNtk, 0, 0, 0 );
Abc_NtkDelete( pNtkTemp );
Abc_NtkRewrite( pNtk, 0, 0, 0, 0, 0 );
pNtk = Abc_NtkBalance( pNtkTemp = pNtk, 0, 0, 0 );
Abc_NtkDelete( pNtkTemp );
Abc_NtkRewrite( pNtk, 0, 0, 0, 0, 0 );
Abc_NtkRefactor( pNtk, 10, 16, 0, 0, 0, 0 );
//printf( "After rwsat = %d. ", Abc_NtkNodeNum(pNtk) );
//ABC_PRT( "Time", clock() - clk );
}
// convert ABC network into IVY network
pMan = Abc_NtkIvyBefore( pNtk, 0, 0 );
// solve the CEC problem
RetValue = Ivy_FraigProve( &pMan, pParams );
// convert IVY network into ABC network
pNtk = Abc_NtkIvyAfter( pNtkTemp = pNtk, pMan, 0, 0 );
Abc_NtkDelete( pNtkTemp );
// transfer model if given
pNtk->pModel = pMan->pData; pMan->pData = NULL;
Ivy_ManStop( pMan );
// try to prove it using brute force SAT
if ( RetValue < 0 && pParams->fUseBdds )
{
if ( pParams->fVerbose )
{
printf( "Attempting BDDs with node limit %d ...\n", pParams->nBddSizeLimit );
fflush( stdout );
}
pNtk = Abc_NtkCollapse( pNtkTemp = pNtk, pParams->nBddSizeLimit, 0, pParams->fBddReorder, 0 );
if ( pNtk )
{
Abc_NtkDelete( pNtkTemp );
RetValue = ( (Abc_NtkNodeNum(pNtk) == 1) && (Abc_ObjFanin0(Abc_NtkPo(pNtk,0))->pData == Cudd_ReadLogicZero(pNtk->pManFunc)) );
}
else
pNtk = pNtkTemp;
}
// return the result
*ppNtk = pNtk;
return RetValue;
}
/**Function*************************************************************
Synopsis [Gives the current ABC network to AIG manager for processing.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkIvy( Abc_Ntk_t * pNtk )
{
// Abc_Ntk_t * pNtkAig;
Ivy_Man_t * pMan;//, * pTemp;
// int fCleanup = 1;
// int nNodes;
// int nLatches = Abc_NtkLatchNum(pNtk);
Vec_Int_t * vInit = Abc_NtkCollectLatchValuesIvy( pNtk, 0 );
assert( !Abc_NtkIsNetlist(pNtk) );
if ( Abc_NtkIsBddLogic(pNtk) )
{
if ( !Abc_NtkBddToSop(pNtk, 0) )
{
Vec_IntFree( vInit );
printf( "Abc_NtkIvy(): Converting to SOPs has failed.\n" );
return NULL;
}
}
if ( Abc_NtkCountSelfFeedLatches(pNtk) )
{
printf( "Warning: The network has %d self-feeding latches. Quitting.\n", Abc_NtkCountSelfFeedLatches(pNtk) );
return NULL;
}
// print warning about choice nodes
if ( Abc_NtkGetChoiceNum( pNtk ) )
printf( "Warning: The choice nodes in the initial AIG are removed by strashing.\n" );
// convert to the AIG manager
pMan = Abc_NtkToIvy( pNtk );
if ( !Ivy_ManCheck( pMan ) )
{
Vec_IntFree( vInit );
printf( "AIG check has failed.\n" );
Ivy_ManStop( pMan );
return NULL;
}
// Ivy_MffcTest( pMan );
// Ivy_ManPrintStats( pMan );
// pMan = Ivy_ManBalance( pTemp = pMan, 1 );
// Ivy_ManStop( pTemp );
// Ivy_ManSeqRewrite( pMan, 0, 0 );
// Ivy_ManTestCutsAlg( pMan );
// Ivy_ManTestCutsBool( pMan );
// Ivy_ManRewriteAlg( pMan, 1, 1 );
// pMan = Ivy_ManResyn( pTemp = pMan, 1, 0 );
// Ivy_ManStop( pTemp );
// Ivy_ManTestCutsAll( pMan );
// Ivy_ManTestCutsTravAll( pMan );
// Ivy_ManPrintStats( pMan );
// Ivy_ManPrintStats( pMan );
// Ivy_ManRewritePre( pMan, 1, 0, 0 );
// Ivy_ManPrintStats( pMan );
// printf( "\n" );
// Ivy_ManPrintStats( pMan );
// Ivy_ManMakeSeq( pMan, nLatches, pInit );
// Ivy_ManPrintStats( pMan );
// Ivy_ManRequiredLevels( pMan );
// Ivy_FastMapPerform( pMan, 8 );
Ivy_ManStop( pMan );
return NULL;
/*
// convert from the AIG manager
pNtkAig = Abc_NtkFromIvy( pNtk, pMan );
// pNtkAig = Abc_NtkFromIvySeq( pNtk, pMan );
Ivy_ManStop( pMan );
// report the cleanup results
if ( fCleanup && (nNodes = Abc_AigCleanup(pNtkAig->pManFunc)) )
printf( "Warning: AIG cleanup removed %d nodes (this is not a bug).\n", nNodes );
// duplicate EXDC
if ( pNtk->pExdc )
pNtkAig->pExdc = Abc_NtkDup( pNtk->pExdc );
// make sure everything is okay
if ( !Abc_NtkCheck( pNtkAig ) )
{
ABC_FREE( pInit );
printf( "Abc_NtkStrash: The network check has failed.\n" );
Abc_NtkDelete( pNtkAig );
return NULL;
}
ABC_FREE( pInit );
return pNtkAig;
*/
}
/**Function*************************************************************
Synopsis [Converts the network from the AIG manager into ABC.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkFromIvy( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan )
{
Vec_Int_t * vNodes;
Abc_Ntk_t * pNtk;
Abc_Obj_t * pObj, * pObjNew, * pFaninNew, * pFaninNew0, * pFaninNew1;
Ivy_Obj_t * pNode;
int i;
// perform strashing
pNtk = Abc_NtkStartFrom( pNtkOld, ABC_NTK_STRASH, ABC_FUNC_AIG );
// transfer the pointers to the basic nodes
Ivy_ManConst1(pMan)->TravId = Abc_EdgeFromNode( Abc_AigConst1(pNtk) );
Abc_NtkForEachCi( pNtkOld, pObj, i )
Ivy_ManPi(pMan, i)->TravId = Abc_EdgeFromNode( pObj->pCopy );
// rebuild the AIG
vNodes = Ivy_ManDfs( pMan );
Ivy_ManForEachNodeVec( pMan, vNodes, pNode, i )
{
// add the first fanin
pFaninNew0 = Abc_ObjFanin0Ivy( pNtk, pNode );
if ( Ivy_ObjIsBuf(pNode) )
{
pNode->TravId = Abc_EdgeFromNode( pFaninNew0 );
continue;
}
// add the second fanin
pFaninNew1 = Abc_ObjFanin1Ivy( pNtk, pNode );
// create the new node
if ( Ivy_ObjIsExor(pNode) )
pObjNew = Abc_AigXor( pNtk->pManFunc, pFaninNew0, pFaninNew1 );
else
pObjNew = Abc_AigAnd( pNtk->pManFunc, pFaninNew0, pFaninNew1 );
pNode->TravId = Abc_EdgeFromNode( pObjNew );
}
// connect the PO nodes
Abc_NtkForEachCo( pNtkOld, pObj, i )
{
pFaninNew = Abc_ObjFanin0Ivy( pNtk, Ivy_ManPo(pMan, i) );
Abc_ObjAddFanin( pObj->pCopy, pFaninNew );
}
Vec_IntFree( vNodes );
if ( !Abc_NtkCheck( pNtk ) )
fprintf( stdout, "Abc_NtkFromIvy(): Network check has failed.\n" );
return pNtk;
}
/**Function*************************************************************
Synopsis [Converts the network from the AIG manager into ABC.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkFromIvySeq( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan, int fHaig )
{
Vec_Int_t * vNodes, * vLatches;
Abc_Ntk_t * pNtk;
Abc_Obj_t * pObj, * pObjNew, * pFaninNew, * pFaninNew0, * pFaninNew1;
Ivy_Obj_t * pNode, * pTemp;
int i;
// assert( Ivy_ManLatchNum(pMan) > 0 );
// perform strashing
pNtk = Abc_NtkStartFromNoLatches( pNtkOld, ABC_NTK_STRASH, ABC_FUNC_AIG );
// transfer the pointers to the basic nodes
Ivy_ManConst1(pMan)->TravId = Abc_EdgeFromNode( Abc_AigConst1(pNtk) );
Abc_NtkForEachPi( pNtkOld, pObj, i )
Ivy_ManPi(pMan, i)->TravId = Abc_EdgeFromNode( pObj->pCopy );
// create latches of the new network
vNodes = Ivy_ManDfsSeq( pMan, &vLatches );
Ivy_ManForEachNodeVec( pMan, vLatches, pNode, i )
{
pObjNew = Abc_NtkCreateLatch( pNtk );
pFaninNew0 = Abc_NtkCreateBi( pNtk );
pFaninNew1 = Abc_NtkCreateBo( pNtk );
Abc_ObjAddFanin( pObjNew, pFaninNew0 );
Abc_ObjAddFanin( pFaninNew1, pObjNew );
if ( fHaig || Ivy_ObjInit(pNode) == IVY_INIT_DC )
Abc_LatchSetInitDc( pObjNew );
else if ( Ivy_ObjInit(pNode) == IVY_INIT_1 )
Abc_LatchSetInit1( pObjNew );
else if ( Ivy_ObjInit(pNode) == IVY_INIT_0 )
Abc_LatchSetInit0( pObjNew );
else assert( 0 );
pNode->TravId = Abc_EdgeFromNode( pFaninNew1 );
}
Abc_NtkAddDummyBoxNames( pNtk );
// rebuild the AIG
Ivy_ManForEachNodeVec( pMan, vNodes, pNode, i )
{
// add the first fanin
pFaninNew0 = Abc_ObjFanin0Ivy( pNtk, pNode );
if ( Ivy_ObjIsBuf(pNode) )
{
pNode->TravId = Abc_EdgeFromNode( pFaninNew0 );
continue;
}
// add the second fanin
pFaninNew1 = Abc_ObjFanin1Ivy( pNtk, pNode );
// create the new node
if ( Ivy_ObjIsExor(pNode) )
pObjNew = Abc_AigXor( pNtk->pManFunc, pFaninNew0, pFaninNew1 );
else
pObjNew = Abc_AigAnd( pNtk->pManFunc, pFaninNew0, pFaninNew1 );
pNode->TravId = Abc_EdgeFromNode( pObjNew );
// process the choice nodes
if ( fHaig && pNode->pEquiv && Ivy_ObjRefs(pNode) > 0 )
{
pFaninNew = Abc_EdgeToNode( pNtk, pNode->TravId );
// pFaninNew->fPhase = 0;
assert( !Ivy_IsComplement(pNode->pEquiv) );
for ( pTemp = pNode->pEquiv; pTemp != pNode; pTemp = Ivy_Regular(pTemp->pEquiv) )
{
pFaninNew1 = Abc_EdgeToNode( pNtk, pTemp->TravId );
// pFaninNew1->fPhase = Ivy_IsComplement( pTemp->pEquiv );
pFaninNew->pData = pFaninNew1;
pFaninNew = pFaninNew1;
}
pFaninNew->pData = NULL;
// printf( "Writing choice node %d.\n", pNode->Id );
}
}
// connect the PO nodes
Abc_NtkForEachPo( pNtkOld, pObj, i )
{
pFaninNew = Abc_ObjFanin0Ivy( pNtk, Ivy_ManPo(pMan, i) );
Abc_ObjAddFanin( pObj->pCopy, pFaninNew );
}
// connect the latches
Ivy_ManForEachNodeVec( pMan, vLatches, pNode, i )
{
pFaninNew = Abc_ObjFanin0Ivy( pNtk, pNode );
Abc_ObjAddFanin( Abc_ObjFanin0(Abc_NtkBox(pNtk, i)), pFaninNew );
}
Vec_IntFree( vLatches );
Vec_IntFree( vNodes );
if ( !Abc_NtkCheck( pNtk ) )
fprintf( stdout, "Abc_NtkFromIvySeq(): Network check has failed.\n" );
return pNtk;
}
/**Function*************************************************************
Synopsis [Converts the network from the AIG manager into ABC.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Ivy_Man_t * Abc_NtkToIvy( Abc_Ntk_t * pNtkOld )
{
Ivy_Man_t * pMan;
Abc_Obj_t * pObj;
Ivy_Obj_t * pFanin;
int i;
// create the manager
assert( Abc_NtkHasSop(pNtkOld) || Abc_NtkIsStrash(pNtkOld) );
pMan = Ivy_ManStart();
// create the PIs
if ( Abc_NtkIsStrash(pNtkOld) )
Abc_AigConst1(pNtkOld)->pCopy = (Abc_Obj_t *)Ivy_ManConst1(pMan);
Abc_NtkForEachCi( pNtkOld, pObj, i )
pObj->pCopy = (Abc_Obj_t *)Ivy_ObjCreatePi(pMan);
// perform the conversion of the internal nodes
Abc_NtkStrashPerformAig( pNtkOld, pMan );
// create the POs
Abc_NtkForEachCo( pNtkOld, pObj, i )
{
pFanin = (Ivy_Obj_t *)Abc_ObjFanin0(pObj)->pCopy;
pFanin = Ivy_NotCond( pFanin, Abc_ObjFaninC0(pObj) );
Ivy_ObjCreatePo( pMan, pFanin );
}
Ivy_ManCleanup( pMan );
return pMan;
}
/**Function*************************************************************
Synopsis [Prepares the network for strashing.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkStrashPerformAig( Abc_Ntk_t * pNtk, Ivy_Man_t * pMan )
{
// ProgressBar * pProgress;
Vec_Ptr_t * vNodes;
Abc_Obj_t * pNode;
int i;
vNodes = Abc_NtkDfs( pNtk, 0 );
// pProgress = Extra_ProgressBarStart( stdout, vNodes->nSize );
Vec_PtrForEachEntry( vNodes, pNode, i )
{
// Extra_ProgressBarUpdate( pProgress, i, NULL );
pNode->pCopy = (Abc_Obj_t *)Abc_NodeStrashAig( pMan, pNode );
}
// Extra_ProgressBarStop( pProgress );
Vec_PtrFree( vNodes );
}
/**Function*************************************************************
Synopsis [Strashes one logic node.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Ivy_Obj_t * Abc_NodeStrashAig( Ivy_Man_t * pMan, Abc_Obj_t * pNode )
{
int fUseFactor = 1;
char * pSop;
Ivy_Obj_t * pFanin0, * pFanin1;
assert( Abc_ObjIsNode(pNode) );
// consider the case when the graph is an AIG
if ( Abc_NtkIsStrash(pNode->pNtk) )
{
if ( Abc_AigNodeIsConst(pNode) )
return Ivy_ManConst1(pMan);
pFanin0 = (Ivy_Obj_t *)Abc_ObjFanin0(pNode)->pCopy;
pFanin0 = Ivy_NotCond( pFanin0, Abc_ObjFaninC0(pNode) );
pFanin1 = (Ivy_Obj_t *)Abc_ObjFanin1(pNode)->pCopy;
pFanin1 = Ivy_NotCond( pFanin1, Abc_ObjFaninC1(pNode) );
return Ivy_And( pMan, pFanin0, pFanin1 );
}
// get the SOP of the node
if ( Abc_NtkHasMapping(pNode->pNtk) )
pSop = Mio_GateReadSop(pNode->pData);
else
pSop = pNode->pData;
// consider the constant node
if ( Abc_NodeIsConst(pNode) )
return Ivy_NotCond( Ivy_ManConst1(pMan), Abc_SopIsConst0(pSop) );
// consider the special case of EXOR function
if ( Abc_SopIsExorType(pSop) )
return Abc_NodeStrashAigExorAig( pMan, pNode, pSop );
// decide when to use factoring
if ( fUseFactor && Abc_ObjFaninNum(pNode) > 2 && Abc_SopGetCubeNum(pSop) > 1 )
return Abc_NodeStrashAigFactorAig( pMan, pNode, pSop );
return Abc_NodeStrashAigSopAig( pMan, pNode, pSop );
}
/**Function*************************************************************
Synopsis [Strashes one logic node using its SOP.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Ivy_Obj_t * Abc_NodeStrashAigSopAig( Ivy_Man_t * pMan, Abc_Obj_t * pNode, char * pSop )
{
Abc_Obj_t * pFanin;
Ivy_Obj_t * pAnd, * pSum;
char * pCube;
int i, nFanins;
// get the number of node's fanins
nFanins = Abc_ObjFaninNum( pNode );
assert( nFanins == Abc_SopGetVarNum(pSop) );
// go through the cubes of the node's SOP
pSum = Ivy_Not( Ivy_ManConst1(pMan) );
Abc_SopForEachCube( pSop, nFanins, pCube )
{
// create the AND of literals
pAnd = Ivy_ManConst1(pMan);
Abc_ObjForEachFanin( pNode, pFanin, i ) // pFanin can be a net
{
if ( pCube[i] == '1' )
pAnd = Ivy_And( pMan, pAnd, (Ivy_Obj_t *)pFanin->pCopy );
else if ( pCube[i] == '0' )
pAnd = Ivy_And( pMan, pAnd, Ivy_Not((Ivy_Obj_t *)pFanin->pCopy) );
}
// add to the sum of cubes
pSum = Ivy_Or( pMan, pSum, pAnd );
}
// decide whether to complement the result
if ( Abc_SopIsComplement(pSop) )
pSum = Ivy_Not(pSum);
return pSum;
}
/**Function*************************************************************
Synopsis [Strashed n-input XOR function.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Ivy_Obj_t * Abc_NodeStrashAigExorAig( Ivy_Man_t * pMan, Abc_Obj_t * pNode, char * pSop )
{
Abc_Obj_t * pFanin;
Ivy_Obj_t * pSum;
int i, nFanins;
// get the number of node's fanins
nFanins = Abc_ObjFaninNum( pNode );
assert( nFanins == Abc_SopGetVarNum(pSop) );
// go through the cubes of the node's SOP
pSum = Ivy_Not( Ivy_ManConst1(pMan) );
for ( i = 0; i < nFanins; i++ )
{
pFanin = Abc_ObjFanin( pNode, i );
pSum = Ivy_Exor( pMan, pSum, (Ivy_Obj_t *)pFanin->pCopy );
}
if ( Abc_SopIsComplement(pSop) )
pSum = Ivy_Not(pSum);
return pSum;
}
/**Function*************************************************************
Synopsis [Strashes one logic node using its SOP.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Ivy_Obj_t * Abc_NodeStrashAigFactorAig( Ivy_Man_t * pMan, Abc_Obj_t * pRoot, char * pSop )
{
Dec_Graph_t * pFForm;
Dec_Node_t * pNode;
Ivy_Obj_t * pAnd;
int i;
// extern Ivy_Obj_t * Dec_GraphToNetworkAig( Ivy_Man_t * pMan, Dec_Graph_t * pGraph );
extern Ivy_Obj_t * Dec_GraphToNetworkIvy( Ivy_Man_t * pMan, Dec_Graph_t * pGraph );
// assert( 0 );
// perform factoring
pFForm = Dec_Factor( pSop );
// collect the fanins
Dec_GraphForEachLeaf( pFForm, pNode, i )
pNode->pFunc = Abc_ObjFanin(pRoot,i)->pCopy;
// perform strashing
// pAnd = Dec_GraphToNetworkAig( pMan, pFForm );
pAnd = Dec_GraphToNetworkIvy( pMan, pFForm );
// pAnd = NULL;
Dec_GraphFree( pFForm );
return pAnd;
}
/**Function*************************************************************
Synopsis [Strashes one logic node using its SOP.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Int_t * Abc_NtkCollectLatchValuesIvy( Abc_Ntk_t * pNtk, int fUseDcs )
{
Abc_Obj_t * pLatch;
Vec_Int_t * vArray;
int i;
vArray = Vec_IntAlloc( Abc_NtkLatchNum(pNtk) );
Abc_NtkForEachLatch( pNtk, pLatch, i )
{
if ( fUseDcs || Abc_LatchIsInitDc(pLatch) )
Vec_IntPush( vArray, IVY_INIT_DC );
else if ( Abc_LatchIsInit1(pLatch) )
Vec_IntPush( vArray, IVY_INIT_1 );
else if ( Abc_LatchIsInit0(pLatch) )
Vec_IntPush( vArray, IVY_INIT_0 );
else assert( 0 );
}
return vArray;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
|