From d556ad65ff4b1ef172ec041a0b4c85f4e1ae909e Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Sun, 6 Sep 2020 23:15:21 -0700 Subject: Adding switch &cec -w to print SAT solver stats. --- src/proof/cec/cecCec.c | 1 + src/proof/cec/cecCore.c | 2 +- src/proof/cec/cecMan.c | 1 + 3 files changed, 3 insertions(+), 1 deletion(-) (limited to 'src/proof') diff --git a/src/proof/cec/cecCec.c b/src/proof/cec/cecCec.c index d450cead..cfa07ff8 100644 --- a/src/proof/cec/cecCec.c +++ b/src/proof/cec/cecCec.c @@ -360,6 +360,7 @@ int Cec_ManVerify( Gia_Man_t * pInit, Cec_ParCec_t * pPars ) pParsFra->nBTLimit = pPars->nBTLimit; pParsFra->TimeLimit = pPars->TimeLimit; pParsFra->fVerbose = pPars->fVerbose; + pParsFra->fVeryVerbose = pPars->fVeryVerbose; pParsFra->fCheckMiter = 1; pParsFra->fDualOut = 1; pNew = Cec_ManSatSweeping( p, pParsFra, pPars->fSilent ); diff --git a/src/proof/cec/cecCore.c b/src/proof/cec/cecCore.c index 9f218dd3..54f64626 100644 --- a/src/proof/cec/cecCore.c +++ b/src/proof/cec/cecCore.c @@ -385,7 +385,7 @@ Gia_Man_t * Cec_ManSatSweeping( Gia_Man_t * pAig, Cec_ParFra_t * pPars, int fSil pParsSat->fVerbose = pPars->fVeryVerbose; // simulation patterns pPat = Cec_ManPatStart(); - pPat->fVerbose = pPars->fVeryVerbose; + //pPat->fVerbose = pPars->fVeryVerbose; // start equivalence classes clk = Abc_Clock(); diff --git a/src/proof/cec/cecMan.c b/src/proof/cec/cecMan.c index 1d32b99e..c636a00d 100644 --- a/src/proof/cec/cecMan.c +++ b/src/proof/cec/cecMan.c @@ -73,6 +73,7 @@ Cec_ManSat_t * Cec_ManSatCreate( Gia_Man_t * pAig, Cec_ParSat_t * pPars ) ***********************************************************************/ void Cec_ManSatPrintStats( Cec_ManSat_t * p ) { + printf( "SAT solver statistics:\n" ); Abc_Print( 1, "CO = %8d ", Gia_ManCoNum(p->pAig) ); Abc_Print( 1, "AND = %8d ", Gia_ManAndNum(p->pAig) ); Abc_Print( 1, "Conf = %5d ", p->pPars->nBTLimit ); -- cgit v1.2.3