From 8eef7f8326e715ea4e9e84f46487cf4657601c25 Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Mon, 20 Feb 2006 08:01:00 -0800 Subject: Version abc60220 --- src/base/io/ioReadVerilog.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/base/io/ioReadVerilog.c') diff --git a/src/base/io/ioReadVerilog.c b/src/base/io/ioReadVerilog.c index 58071e39..a4610cac 100644 --- a/src/base/io/ioReadVerilog.c +++ b/src/base/io/ioReadVerilog.c @@ -272,8 +272,8 @@ Abc_Ntk_t * Io_ReadVerNetwork( Io_ReadVer_t * p ) // allocate the empty network pNtk = Abc_NtkAlloc( ABC_NTK_NETLIST, ABC_FUNC_SOP ); - pNtk->pName = util_strsav( pModelName ); - pNtk->pSpec = util_strsav( p->pFileName ); + pNtk->pName = Extra_UtilStrsav( pModelName ); + pNtk->pSpec = Extra_UtilStrsav( p->pFileName ); // create constant nodes and nets Abc_NtkFindOrCreateNet( pNtk, "1'b0" ); @@ -334,7 +334,7 @@ Abc_Ntk_t * Io_ReadVerNetwork( Io_ReadVer_t * p ) } // add the tri-state element to the skipped ones sprintf( Buffer, "%s %s", vTokens->pArray[0], vTokens->pArray[1] ); - Vec_PtrPush( p->vSkipped, util_strsav(Buffer) ); + Vec_PtrPush( p->vSkipped, Extra_UtilStrsav(Buffer) ); } Extra_ProgressBarStop( pProgress ); -- cgit v1.2.3