From 99ddb64095b7fdd0d39b29ee04c962c1d8b63d35 Mon Sep 17 00:00:00 2001
From: Alan Mishchenko <alanmi@berkeley.edu>
Date: Sun, 28 Jan 2018 18:53:20 -0800
Subject: Adding support of reading and writing designs using a new internal
 format.

---
 src/aig/miniaig/ndr.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src/aig')

diff --git a/src/aig/miniaig/ndr.h b/src/aig/miniaig/ndr.h
index 22aa33e3..325cf5d9 100644
--- a/src/aig/miniaig/ndr.h
+++ b/src/aig/miniaig/ndr.h
@@ -379,7 +379,7 @@ static inline void Ndr_ModuleWriteVerilog( char * pFileName, void * pModule, cha
     }
 
     fprintf( pFile, "\nendmodule\n\n" );
-    fclose( pFile );
+    if ( pFileName ) fclose( pFile );
 }
 
 
@@ -507,6 +507,7 @@ static inline void Ndr_ModuleTest()
 
     // write Verilog for verification
     Ndr_ModuleWriteVerilog( NULL, pModule, ppNames );
+    Ndr_ModuleWrite( "add4.ndr", pModule );
     Ndr_ModuleDelete( pModule );
 }
 
-- 
cgit v1.2.3