From 273ba03041ee4cac93385f180d1397b49f8094ca Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Tue, 9 Aug 2005 08:01:00 -0700 Subject: Version abc50809 --- abc.dsp | 44 +++++ abc.opt | Bin 52736 -> 52736 bytes abc.plg | 36 +++- abc.rc | 3 + src/base/abc/abc.c | 175 +++++++++++++++++ src/base/abc/abc.h | 4 + src/base/abc/abcCreate.c | 104 ++++++++++ src/base/abc/abcDfs.c | 125 +++++++++++- src/base/io/io.c | 69 ++++++- src/base/io/io.h | 6 +- src/base/io/ioInt.h | 2 +- src/base/io/ioRead.c | 2 + src/base/io/ioReadPla.c | 263 +++++++++++++++++++++++++ src/base/io/ioWriteBench.c | 2 +- src/base/io/ioWritePla.c | 187 ++++++++++++++++++ src/base/io/module.make | 4 +- src/map/mio/mioRead.c | 1 - src/misc/extra/extra.h | 18 ++ src/misc/extra/extraUtilBitMatrix.c | 359 ++++++++++++++++++++++++++++++++++ src/misc/extra/module.make | 1 + src/misc/vec/vecInt.h | 23 +++ src/misc/vec/vecPtr.h | 46 ++++- src/misc/vec/vecStr.h | 24 ++- src/sat/sim/sim.h | 136 +++++++++++++ src/sat/sim/simMan.c | 166 ++++++++++++++++ src/sat/sim/simSat.c | 48 +++++ src/sat/sim/simSupp.c | 265 +++++++++++++++++++++++++ src/sat/sim/simSym.c | 48 +++++ src/sat/sim/simUnate.c | 48 +++++ src/sat/sim/simUtils.c | 379 ++++++++++++++++++++++++++++++++++++ 30 files changed, 2560 insertions(+), 28 deletions(-) create mode 100644 src/base/io/ioReadPla.c create mode 100644 src/base/io/ioWritePla.c create mode 100644 src/misc/extra/extraUtilBitMatrix.c create mode 100644 src/sat/sim/sim.h create mode 100644 src/sat/sim/simMan.c create mode 100644 src/sat/sim/simSat.c create mode 100644 src/sat/sim/simSupp.c create mode 100644 src/sat/sim/simSym.c create mode 100644 src/sat/sim/simUnate.c create mode 100644 src/sat/sim/simUtils.c diff --git a/abc.dsp b/abc.dsp index e25f44c8..e68fe877 100644 --- a/abc.dsp +++ b/abc.dsp @@ -293,6 +293,10 @@ SOURCE=.\src\base\io\ioReadBlif.c # End Source File # Begin Source File +SOURCE=.\src\base\io\ioReadPla.c +# End Source File +# Begin Source File + SOURCE=.\src\base\io\ioReadVerilog.c # End Source File # Begin Source File @@ -315,6 +319,10 @@ SOURCE=.\src\base\io\ioWriteCnf.c SOURCE=.\src\base\io\ioWriteGate.c # End Source File +# Begin Source File + +SOURCE=.\src\base\io\ioWritePla.c +# End Source File # End Group # Begin Group "main" @@ -972,6 +980,38 @@ SOURCE=.\src\sat\fraig\fraigUtil.c SOURCE=.\src\sat\fraig\fraigVec.c # End Source File # End Group +# Begin Group "sim" + +# PROP Default_Filter "" +# Begin Source File + +SOURCE=.\src\sat\sim\sim.h +# End Source File +# Begin Source File + +SOURCE=.\src\sat\sim\simMan.c +# End Source File +# Begin Source File + +SOURCE=.\src\sat\sim\simSat.c +# End Source File +# Begin Source File + +SOURCE=.\src\sat\sim\simSupp.c +# End Source File +# Begin Source File + +SOURCE=.\src\sat\sim\simSym.c +# End Source File +# Begin Source File + +SOURCE=.\src\sat\sim\simUnate.c +# End Source File +# Begin Source File + +SOURCE=.\src\sat\sim\simUtils.c +# End Source File +# End Group # End Group # Begin Group "opt" @@ -1265,6 +1305,10 @@ SOURCE=.\src\misc\extra\extraUtilBdd.c # End Source File # Begin Source File +SOURCE=.\src\misc\extra\extraUtilBitMatrix.c +# End Source File +# Begin Source File + SOURCE=.\src\misc\extra\extraUtilFile.c # End Source File # Begin Source File diff --git a/abc.opt b/abc.opt index 68769b75..70b6511f 100644 Binary files a/abc.opt and b/abc.opt differ diff --git a/abc.plg b/abc.plg index ee6e93a6..32aa5a29 100644 --- a/abc.plg +++ b/abc.plg @@ -6,13 +6,13 @@ --------------------Configuration: abc - Win32 Debug--------------------

Command Lines

-Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP84B.tmp" with contents +Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSPD94.tmp" with contents [ /nologo /MLd /W3 /Gm /GX /ZI /Od /I "src\base\abc" /I "src\base\cmd" /I "src\base\io" /I "src\base\main" /I "src\bdd\cudd" /I "src\bdd\epd" /I "src\bdd\mtr" /I "src\bdd\parse" /I "src\bdd\dsd" /I "src\bdd\reo" /I "src\sop\mvc" /I "src\sop\ft" /I "src\sat\asat" /I "src\sat\msat" /I "src\sat\fraig" /I "src\opt\fxa" /I "src\opt\fxu" /I "src\map\fpga" /I "src\map\mapper" /I "src\map\mio" /I "src\map\super" /I "src\misc\extra" /I "src\misc\st" /I "src\misc\util" /I "src\misc\vec" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D "__STDC__" /D "HAVE_ASSERT_H" /FR"Debug/" /Fp"Debug/abc.pch" /YX /Fo"Debug/" /Fd"Debug/" /FD /GZ /c -"C:\_projects\abc\src\base\abc\abcRes.c" +"C:\_projects\abc\src\sat\sim\simSupp.c" ] -Creating command line "cl.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP84B.tmp" -Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP84C.tmp" with contents +Creating command line "cl.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSPD94.tmp" +Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSPD95.tmp" with contents [ kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /subsystem:console /incremental:yes /pdb:"Debug/abc.pdb" /debug /machine:I386 /out:"_TEST/abc.exe" /pdbtype:sept .\Debug\abc.obj @@ -57,12 +57,14 @@ kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32 .\Debug\ioRead.obj .\Debug\ioReadBench.obj .\Debug\ioReadBlif.obj +.\Debug\ioReadPla.obj .\Debug\ioReadVerilog.obj .\Debug\ioWriteBench.obj .\Debug\ioWriteBlif.obj .\Debug\ioWriteBlifLogic.obj .\Debug\ioWriteCnf.obj .\Debug\ioWriteGate.obj +.\Debug\ioWritePla.obj .\Debug\main.obj .\Debug\mainFrame.obj .\Debug\mainInit.obj @@ -258,13 +260,20 @@ kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32 .\Debug\safe_mem.obj .\Debug\strsav.obj .\Debug\texpand.obj +.\Debug\simUtils.obj +.\Debug\simSat.obj +.\Debug\simSupp.obj +.\Debug\simSym.obj +.\Debug\simUnate.obj +.\Debug\simMan.obj +.\Debug\extraUtilBitMatrix.obj ] -Creating command line "link.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP84C.tmp" +Creating command line "link.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSPD95.tmp"

Output Window

Compiling... -abcRes.c +simSupp.c Linking... -Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP84D.tmp" with contents +Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSPD96.tmp" with contents [ /nologo /o"Debug/abc.bsc" .\Debug\abc.sbr @@ -309,12 +318,14 @@ Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP84D.tmp" with conte .\Debug\ioRead.sbr .\Debug\ioReadBench.sbr .\Debug\ioReadBlif.sbr +.\Debug\ioReadPla.sbr .\Debug\ioReadVerilog.sbr .\Debug\ioWriteBench.sbr .\Debug\ioWriteBlif.sbr .\Debug\ioWriteBlifLogic.sbr .\Debug\ioWriteCnf.sbr .\Debug\ioWriteGate.sbr +.\Debug\ioWritePla.sbr .\Debug\main.sbr .\Debug\mainFrame.sbr .\Debug\mainInit.sbr @@ -509,8 +520,15 @@ Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP84D.tmp" with conte .\Debug\pathsearch.sbr .\Debug\safe_mem.sbr .\Debug\strsav.sbr -.\Debug\texpand.sbr] -Creating command line "bscmake.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP84D.tmp" +.\Debug\texpand.sbr +.\Debug\simUtils.sbr +.\Debug\simSat.sbr +.\Debug\simSupp.sbr +.\Debug\simSym.sbr +.\Debug\simUnate.sbr +.\Debug\simMan.sbr +.\Debug\extraUtilBitMatrix.sbr] +Creating command line "bscmake.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSPD96.tmp" Creating browse info file...

Output Window

diff --git a/abc.rc b/abc.rc index 70349d3b..1c5904f1 100644 --- a/abc.rc +++ b/abc.rc @@ -7,10 +7,12 @@ alias pf print_factor alias pfan print_fanio alias pio print_io alias ps print_stats +alias psu print_supp alias q quit alias r read alias rl read_blif alias rb read_bench +alias rp read_pla alias rv read_verilog alias rsup read_super mcnc5_old.super alias rlib read_library @@ -21,6 +23,7 @@ alias u undo alias wb write_blif alias wg write_gate alias wl write_blif +alias wp write_pla alias cnf "st; renode -c; write_cnf" alias prove "st; renode -c; sat" alias opt "st; b; renode; sop; ps" diff --git a/src/base/abc/abc.c b/src/base/abc/abc.c index b8c9a3ef..f64cc008 100644 --- a/src/base/abc/abc.c +++ b/src/base/abc/abc.c @@ -32,6 +32,8 @@ static int Abc_CommandPrintStats ( Abc_Frame_t * pAbc, int argc, char ** argv static int Abc_CommandPrintIo ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandPrintFanio ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandPrintFactor ( Abc_Frame_t * pAbc, int argc, char ** argv ); +static int Abc_CommandPrintSupport ( Abc_Frame_t * pAbc, int argc, char ** argv ); + static int Abc_CommandShowBdd ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandCollapse ( Abc_Frame_t * pAbc, int argc, char ** argv ); @@ -50,6 +52,7 @@ static int Abc_CommandSop ( Abc_Frame_t * pAbc, int argc, char ** argv static int Abc_CommandBdd ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandSat ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandExtSeqDcs ( Abc_Frame_t * pAbc, int argc, char ** argv ); +static int Abc_CommandSplit ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandFraig ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandFraigTrust ( Abc_Frame_t * pAbc, int argc, char ** argv ); @@ -89,6 +92,7 @@ void Abc_Init( Abc_Frame_t * pAbc ) Cmd_CommandAdd( pAbc, "Printing", "print_io", Abc_CommandPrintIo, 0 ); Cmd_CommandAdd( pAbc, "Printing", "print_fanio", Abc_CommandPrintFanio, 0 ); Cmd_CommandAdd( pAbc, "Printing", "print_factor", Abc_CommandPrintFactor, 0 ); + Cmd_CommandAdd( pAbc, "Printing", "print_supp", Abc_CommandPrintSupport, 0 ); Cmd_CommandAdd( pAbc, "Printing", "show_bdd", Abc_CommandShowBdd, 0 ); @@ -108,6 +112,7 @@ void Abc_Init( Abc_Frame_t * pAbc ) Cmd_CommandAdd( pAbc, "Various", "bdd", Abc_CommandBdd, 0 ); Cmd_CommandAdd( pAbc, "Various", "sat", Abc_CommandSat, 0 ); Cmd_CommandAdd( pAbc, "Various", "ext_seq_dcs", Abc_CommandExtSeqDcs, 0 ); + Cmd_CommandAdd( pAbc, "Various", "split", Abc_CommandSplit, 1 ); Cmd_CommandAdd( pAbc, "Fraiging", "fraig", Abc_CommandFraig, 1 ); Cmd_CommandAdd( pAbc, "Fraiging", "fraig_trust", Abc_CommandFraigTrust, 1 ); @@ -400,6 +405,62 @@ usage: return 1; } +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +int Abc_CommandPrintSupport( Abc_Frame_t * pAbc, int argc, char ** argv ) +{ + FILE * pOut, * pErr; + Abc_Ntk_t * pNtk; + int c; + extern void * Sim_ComputeSupp( Abc_Ntk_t * pNtk ); + + pNtk = Abc_FrameReadNet(pAbc); + pOut = Abc_FrameReadOut(pAbc); + pErr = Abc_FrameReadErr(pAbc); + + // set defaults + util_getopt_reset(); + while ( ( c = util_getopt( argc, argv, "h" ) ) != EOF ) + { + switch ( c ) + { + case 'h': + goto usage; + default: + goto usage; + } + } + + if ( pNtk == NULL ) + { + fprintf( pErr, "Empty network.\n" ); + return 1; + } + + if ( !Abc_NtkIsAig(pNtk) ) + { + fprintf( pErr, "This command works only for AIGs.\n" ); + return 1; + } + Sim_ComputeSupp( pNtk ); + return 0; + +usage: + fprintf( pErr, "usage: print_supp [-h]\n" ); + fprintf( pErr, "\t prints the supports of the CO nodes\n" ); + fprintf( pErr, "\t-h : print the command usage\n"); + return 1; +} + /**Function************************************************************* Synopsis [] @@ -1677,6 +1738,120 @@ usage: return 1; } +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +int Abc_CommandSplit( Abc_Frame_t * pAbc, int argc, char ** argv ) +{ + FILE * pOut, * pErr; + Abc_Ntk_t * pNtk, * pNtkRes; + Abc_Obj_t * pNode; + int c; + int fUseAllCis; + int Output; + + pNtk = Abc_FrameReadNet(pAbc); + pOut = Abc_FrameReadOut(pAbc); + pErr = Abc_FrameReadErr(pAbc); + + // set defaults + fUseAllCis = 0; + Output = -1; + util_getopt_reset(); + while ( ( c = util_getopt( argc, argv, "oah" ) ) != EOF ) + { + switch ( c ) + { + case 'o': + if ( util_optind >= argc ) + { + fprintf( pErr, "Command line switch \"-o\" should be followed by an integer.\n" ); + goto usage; + } + Output = atoi(argv[util_optind]); + util_optind++; + if ( Output < 0 ) + goto usage; + break; + case 'a': + fUseAllCis ^= 1; + break; + case 'h': + goto usage; + default: + goto usage; + } + } + + if ( pNtk == NULL ) + { + fprintf( pErr, "Empty network.\n" ); + return 1; + } + + if ( !Abc_NtkIsLogic(pNtk) && !Abc_NtkIsAig(pNtk) ) + { + fprintf( pErr, "Currently can only be applied to the logic network or an AIG.\n" ); + return 1; + } + + if ( argc > util_optind + 1 ) + { + fprintf( pErr, "Wrong number of auguments.\n" ); + goto usage; + } + + if ( argc == util_optind + 1 ) + { + pNode = Abc_NtkFindCo( pNtk, argv[util_optind] ); + if ( pNode == NULL ) + { + fprintf( pErr, "Cannot find CO node \"%s\".\n", argv[util_optind] ); + return 1; + } + pNtkRes = Abc_NtkSplitOutput( pNtk, pNode, fUseAllCis ); + } + else + { + if ( Output == -1 ) + { + fprintf( pErr, "The output is not specified.\n" ); + return 1; + } + if ( Output >= Abc_NtkCoNum(pNtk) ) + { + fprintf( pErr, "The 0-based output number (%d) is larger than the number of outputs (%d).\n", Output, Abc_NtkCoNum(pNtk) ); + return 1; + } + pNtkRes = Abc_NtkSplitOutput( pNtk, Abc_NtkCo(pNtk,Output), fUseAllCis ); + } + if ( pNtkRes == NULL ) + { + fprintf( pErr, "Splitting one output has failed.\n" ); + return 1; + } + // replace the current network + Abc_FrameReplaceCurrentNetwork( pAbc, pNtkRes ); + return 0; + +usage: + fprintf( pErr, "usage: split [-o num] [-ah] \n" ); + fprintf( pErr, "\t replaces the current network by the logic cone of one output\n" ); + fprintf( pErr, "\t-a : toggle writing all CIs or structral support only [default = %s]\n", fUseAllCis? "all": "structural" ); + fprintf( pErr, "\t-h : print the command usage\n"); + fprintf( pErr, "\t-o num : (optional) the 0-based number of the output\n"); + fprintf( pErr, "\tname : (optional) the name of the output\n"); + return 1; +} + diff --git a/src/base/abc/abc.h b/src/base/abc/abc.h index 9b9bd81e..ad226c86 100644 --- a/src/base/abc/abc.h +++ b/src/base/abc/abc.h @@ -393,6 +393,7 @@ extern Abc_Ntk_t * Abc_NtkAlloc( Abc_NtkType_t Type ); extern Abc_Ntk_t * Abc_NtkStartFrom( Abc_Ntk_t * pNtk, Abc_NtkType_t Type ); extern void Abc_NtkFinalize( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNtkNew ); extern Abc_Ntk_t * Abc_NtkDup( Abc_Ntk_t * pNtk ); +extern Abc_Ntk_t * Abc_NtkSplitOutput( Abc_Ntk_t * pNtk, Abc_Obj_t * pNode, int fUseAllCis ); extern void Abc_NtkDelete( Abc_Ntk_t * pNtk ); extern Abc_Obj_t * Abc_NtkDupObj( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pObj ); extern void Abc_NtkDeleteObj( Abc_Obj_t * pObj ); @@ -401,6 +402,7 @@ extern void Abc_NtkMarkNetPo( Abc_Obj_t * pObj ); extern Abc_Obj_t * Abc_NtkAddPoNode( Abc_Obj_t * pObj ); extern void Abc_NtkRemovePoNode( Abc_Obj_t * pNode ); extern Abc_Obj_t * Abc_NtkFindNode( Abc_Ntk_t * pNtk, char * pName ); +extern Abc_Obj_t * Abc_NtkFindCo( Abc_Ntk_t * pNtk, char * pName ); extern Abc_Obj_t * Abc_NtkFindNet( Abc_Ntk_t * pNtk, char * pName ); extern Abc_Obj_t * Abc_NtkFindOrCreateNet( Abc_Ntk_t * pNtk, char * pName ); extern Abc_Obj_t * Abc_NtkCreateNode( Abc_Ntk_t * pNtk ); @@ -417,7 +419,9 @@ extern Abc_Obj_t * Abc_NodeCreateMux( Abc_Ntk_t * pNtk, Abc_Obj_t * pNode extern Abc_Obj_t * Abc_NodeClone( Abc_Obj_t * pNode ); /*=== abcDfs.c ==========================================================*/ extern Vec_Ptr_t * Abc_NtkDfs( Abc_Ntk_t * pNtk ); +extern Vec_Ptr_t * Abc_NtkDfsNodes( Abc_Ntk_t * pNtk, Abc_Obj_t ** ppNodes, int nNodes ); extern Vec_Ptr_t * Abc_AigDfs( Abc_Ntk_t * pNtk ); +extern Vec_Ptr_t * Abc_DfsLevelized( Abc_Obj_t * pNode, bool fTfi ); extern int Abc_NtkGetLevelNum( Abc_Ntk_t * pNtk ); extern bool Abc_NtkIsAcyclic( Abc_Ntk_t * pNtk ); /*=== abcFanio.c ==========================================================*/ diff --git a/src/base/abc/abcCreate.c b/src/base/abc/abcCreate.c index 5049a72e..83654635 100644 --- a/src/base/abc/abcCreate.c +++ b/src/base/abc/abcCreate.c @@ -221,6 +221,86 @@ Abc_Ntk_t * Abc_NtkDup( Abc_Ntk_t * pNtk ) return pNtkNew; } +/**Function************************************************************* + + Synopsis [Creates the network composed of one output.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +Abc_Ntk_t * Abc_NtkSplitOutput( Abc_Ntk_t * pNtk, Abc_Obj_t * pNode, int fUseAllCis ) +{ + Vec_Ptr_t * vNodes; + Abc_Ntk_t * pNtkNew; + Abc_Obj_t * pObj, * pFanin; + char Buffer[1000]; + int i, k, Output; + + assert( Abc_NtkIsLogic(pNtk) || Abc_NtkIsAig(pNtk) ); + assert( Abc_ObjIsTerm(pNode) || Abc_ObjIsLatch(pNode) ); + // get the number of this output + Output = -1; + Abc_NtkForEachCo( pNtk, pObj, i ) + if ( pObj == pNode ) + { + Output = i; + break; + } + assert( Output >= 0 ); + + // start the network + pNtkNew = Abc_NtkAlloc( pNtk->Type ); + // duplicate the name and the spec + sprintf( Buffer, "%s_%s", pNtk->pName, Abc_NtkNameCo(pNtk,Output) ); + pNtkNew->pName = util_strsav(Buffer); + + // collect the nodes in the TFI of the output + vNodes = Abc_NtkDfsNodes( pNtk, &pNode, 1 ); + // create the PIs + Abc_NtkForEachCi( pNtk, pObj, i ) + { + if ( fUseAllCis || Abc_NodeIsTravIdCurrent(pObj) ) // TravId is set by DFS + { + pObj->pCopy = Abc_NtkCreateTermPi(pNtkNew); + Abc_NtkLogicStoreName( pObj->pCopy, Abc_NtkNameCi(pNtk, i) ); + } + } + // establish connection between the constant nodes + if ( Abc_NtkIsAig(pNtk) ) + Abc_AigConst1(pNtk->pManFunc)->pCopy = Abc_AigConst1(pNtkNew->pManFunc); + + // copy the nodes + Vec_PtrForEachEntry( vNodes, pObj, i ) + { + // if it is an AIG, add to the hash table + if ( Abc_NtkIsAig(pNtk) ) + { + pObj->pCopy = Abc_AigAnd( pNtkNew->pManFunc, + Abc_ObjNotCond( Abc_ObjFanin0(pObj)->pCopy, Abc_ObjFaninC0(pObj) ), + Abc_ObjNotCond( Abc_ObjFanin1(pObj)->pCopy, Abc_ObjFaninC1(pObj) ) ); + } + else + { + Abc_NtkDupObj( pNtkNew, pObj ); + Abc_ObjForEachFanin( pObj, pFanin, k ) + Abc_ObjAddFanin( pObj->pCopy, pFanin->pCopy ); + } + } + Vec_PtrFree( vNodes ); + // add the PO corresponding to this output + pNode->pCopy = Abc_NtkCreateTermPo( pNtkNew ); + Abc_ObjAddFanin( pNode->pCopy, Abc_ObjFanin0(pNode)->pCopy ); + Abc_NtkLogicStoreName( pNode->pCopy, Abc_NtkNameCo(pNtk, Output) ); + + if ( !Abc_NtkCheck( pNtkNew ) ) + fprintf( stdout, "Abc_NtkDup(): Network check has failed.\n" ); + return pNtkNew; +} + /**Function************************************************************* Synopsis [Deletes the Ntk.] @@ -661,6 +741,30 @@ Abc_Obj_t * Abc_NtkFindNode( Abc_Ntk_t * pNtk, char * pName ) return pNode; } +/**Function************************************************************* + + Synopsis [Returns the net with the given name.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +Abc_Obj_t * Abc_NtkFindCo( Abc_Ntk_t * pNtk, char * pName ) +{ + Abc_Obj_t * pNode; + int i; + // search the node among COs + Abc_NtkForEachCo( pNtk, pNode, i ) + { + if ( strcmp( Abc_NtkNameCo(pNtk,i), pName ) == 0 ) + return pNode; + } + return NULL; +} + /**Function************************************************************* Synopsis [Returns the net with the given name.] diff --git a/src/base/abc/abcDfs.c b/src/base/abc/abcDfs.c index 5c75a94c..b1153d40 100644 --- a/src/base/abc/abcDfs.c +++ b/src/base/abc/abcDfs.c @@ -73,6 +73,45 @@ Vec_Ptr_t * Abc_NtkDfs( Abc_Ntk_t * pNtk ) return vNodes; } +/**Function************************************************************* + + Synopsis [Returns the DFS ordered array of logic nodes.] + + Description [Collects only the internal nodes, leaving out PIs, POs and latches.] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +Vec_Ptr_t * Abc_NtkDfsNodes( Abc_Ntk_t * pNtk, Abc_Obj_t ** ppNodes, int nNodes ) +{ + Vec_Ptr_t * vNodes; + int i, fMadeComb; + // set the traversal ID + Abc_NtkIncrementTravId( pNtk ); + // start the array of nodes + vNodes = Vec_PtrAlloc( 100 ); + // go through the PO nodes and call for each of them + if ( Abc_NtkIsNetlist(pNtk) ) + { + fMadeComb = Abc_NtkMakeComb( pNtk ); + for ( i = 0; i < nNodes; i++ ) + Abc_NtkDfs_rec( ppNodes[i], vNodes ); + if ( fMadeComb ) + Abc_NtkMakeSeq( pNtk ); + } + else + { + for ( i = 0; i < nNodes; i++ ) + if ( Abc_ObjIsCo(ppNodes[i]) ) + Abc_NtkDfs_rec( Abc_ObjFanin0(ppNodes[i]), vNodes ); + else if ( Abc_ObjIsNode(ppNodes[i]) ) + Abc_NtkDfs_rec( ppNodes[i], vNodes ); + } + return vNodes; +} + /**Function************************************************************* Synopsis [Performs DFS for one node.] @@ -89,10 +128,6 @@ void Abc_NtkDfs_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes ) Abc_Obj_t * pFanin; int i; assert( !Abc_ObjIsComplement( pNode ) ); - // skip the PI - if ( Abc_ObjIsPi(pNode) || Abc_ObjIsLatch(pNode) ) - return; - assert( Abc_ObjIsNode( pNode ) ); // if this node is already visited, skip if ( Abc_NodeIsTravIdCurrent( pNode ) ) @@ -100,6 +135,11 @@ void Abc_NtkDfs_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes ) // mark the node as visited Abc_NodeSetTravIdCurrent( pNode ); + // skip the PI + if ( Abc_ObjIsPi(pNode) || Abc_ObjIsLatch(pNode) ) + return; + assert( Abc_ObjIsNode( pNode ) ); + // visit the transitive fanin of the node if ( Abc_NtkIsNetlist(pNode->pNtk) ) { @@ -164,15 +204,15 @@ void Abc_AigDfs_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes ) Abc_Obj_t * pFanin; int i; assert( !Abc_ObjIsComplement( pNode ) ); - // skip the PI - if ( Abc_ObjIsPi(pNode) || Abc_ObjIsLatch(pNode) ) - return; - assert( Abc_ObjIsNode( pNode ) ); // if this node is already visited, skip if ( Abc_NodeIsTravIdCurrent( pNode ) ) return; // mark the node as visited Abc_NodeSetTravIdCurrent( pNode ); + // skip the PI + if ( Abc_ObjIsPi(pNode) || Abc_ObjIsLatch(pNode) ) + return; + assert( Abc_ObjIsNode( pNode ) ); // visit the transitive fanin of the node Abc_ObjForEachFanin( pNode, pFanin, i ) Abc_AigDfs_rec( pFanin, vNodes ); @@ -184,6 +224,75 @@ void Abc_AigDfs_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes ) Vec_PtrPush( vNodes, pNode ); } +/**Function************************************************************* + + Synopsis [Collects nodes in the DFS manner by level.] + + Description [The number of levels should be set!!!] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Abc_DfsLevelizedTfo_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vLevels ) +{ + Abc_Obj_t * pFanout; + int i; + + // if this node is already visited, skip + if ( Abc_NodeIsTravIdCurrent( pNode ) ) + return; + // mark the node as visited + Abc_NodeSetTravIdCurrent( pNode ); + + // skip the terminals + if ( Abc_ObjIsTerm(pNode) || Abc_ObjIsLatch(pNode) ) + return; + assert( Abc_ObjIsNode(pNode) ); + + // add the node to the structure + if ( vLevels->nSize <= (int)pNode->Level ) + { + Vec_PtrGrow( vLevels, pNode->Level + 1 ); + for ( i = vLevels->nSize; i <= (int)pNode->Level; i++ ) + vLevels->pArray[i] = Vec_PtrAlloc( 16 ); + vLevels->nSize = pNode->Level + 1; + } + Vec_PtrPush( vLevels->pArray[pNode->Level], pNode ); + + // visit the TFO + Abc_ObjForEachFanout( pNode, pFanout, i ) + Abc_DfsLevelizedTfo_rec( pFanout, vLevels ); +} + +/**Function************************************************************* + + Synopsis [Collects nodes in the DFS manner by level.] + + Description [The number of levels should be set!!!] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +Vec_Ptr_t * Abc_DfsLevelized( Abc_Obj_t * pNode, bool fTfi ) +{ + Vec_Ptr_t * vLevels; + Abc_Obj_t * pFanout; + int i; + assert( fTfi == 0 ); + // set the traversal ID + Abc_NtkIncrementTravId( pNode->pNtk ); + vLevels = Vec_PtrAlloc( 100 ); + if ( Abc_ObjIsNode(pNode) ) + Abc_DfsLevelizedTfo_rec( pNode, vLevels ); + else + Abc_ObjForEachFanout( pNode, pFanout, i ) + Abc_DfsLevelizedTfo_rec( pFanout, vLevels ); + return vLevels; +} /**Function************************************************************* diff --git a/src/base/io/io.c b/src/base/io/io.c index 4698de91..5e72d307 100644 --- a/src/base/io/io.c +++ b/src/base/io/io.c @@ -35,6 +35,7 @@ static int IoCommandWriteBlif ( Abc_Frame_t * pAbc, int argc, char **argv ); static int IoCommandWriteGate ( Abc_Frame_t * pAbc, int argc, char **argv ); static int IoCommandWriteBench ( Abc_Frame_t * pAbc, int argc, char **argv ); static int IoCommandWriteCnf ( Abc_Frame_t * pAbc, int argc, char **argv ); +static int IoCommandWritePla ( Abc_Frame_t * pAbc, int argc, char **argv ); //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFITIONS /// @@ -63,6 +64,7 @@ void Io_Init( Abc_Frame_t * pAbc ) Cmd_CommandAdd( pAbc, "I/O", "write_gate", IoCommandWriteGate, 0 ); Cmd_CommandAdd( pAbc, "I/O", "write_bench", IoCommandWriteBench, 0 ); Cmd_CommandAdd( pAbc, "I/O", "write_cnf", IoCommandWriteCnf, 0 ); + Cmd_CommandAdd( pAbc, "I/O", "write_pla", IoCommandWritePla, 0 ); } /**Function************************************************************* @@ -445,9 +447,7 @@ int IoCommandReadPla( Abc_Frame_t * pAbc, int argc, char ** argv ) fclose( pFile ); // set the new network -// pNtk = Io_ReadPla( FileName, fCheck ); - fprintf( pAbc->Err, "This command is currently not implemented.\n" ); - pNtk = NULL; + pNtk = Io_ReadPla( FileName, fCheck ); if ( pNtk == NULL ) { fprintf( pAbc->Err, "Reading network from PLA file has failed.\n" ); @@ -759,6 +759,69 @@ usage: return 1; } +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +int IoCommandWritePla( Abc_Frame_t * pAbc, int argc, char **argv ) +{ + char * FileName; + int c; + + util_getopt_reset(); + while ( ( c = util_getopt( argc, argv, "h" ) ) != EOF ) + { + switch ( c ) + { + case 'h': + goto usage; + default: + goto usage; + } + } + + if ( pAbc->pNtkCur == NULL ) + { + fprintf( pAbc->Out, "Empty network.\n" ); + return 0; + } + + if ( Abc_NtkGetLevelNum(pAbc->pNtkCur) > 1 ) + { + fprintf( pAbc->Out, "PLA writing is available for collapsed networks.\n" ); + return 0; + } + + if ( argc != util_optind + 1 ) + { + goto usage; + } + + // get the input file name + FileName = argv[util_optind]; + // write the file + if ( !Io_WritePla( pAbc->pNtkCur, FileName ) ) + { + printf( "Writing PLA has failed.\n" ); + return 1; + } + return 0; + +usage: + fprintf( pAbc->Err, "usage: write_pla [-h] \n" ); + fprintf( pAbc->Err, "\t write the collapsed network into a PLA file\n" ); + fprintf( pAbc->Err, "\t-h : print the help massage\n" ); + fprintf( pAbc->Err, "\tfile : the name of the file to write\n" ); + return 1; +} + //////////////////////////////////////////////////////////////////////// /// END OF FILE /// //////////////////////////////////////////////////////////////////////// diff --git a/src/base/io/io.h b/src/base/io/io.h index ba61faac..d4cea912 100644 --- a/src/base/io/io.h +++ b/src/base/io/io.h @@ -17,7 +17,7 @@ Revision [$Id: io.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $] ***********************************************************************/ - + #ifndef __IO_H__ #define __IO_H__ @@ -54,6 +54,8 @@ extern Abc_Ntk_t * Io_ReadBench( char * pFileName, int fCheck ); /*=== abcReadVerilog.c ==========================================================*/ extern Abc_Ntk_t * Io_ReadVerilog( char * pFileName, int fCheck ); extern void Io_ReadSetNonDrivenNets( Abc_Ntk_t * pNet ); +/*=== abcReadPla.c ==========================================================*/ +extern Abc_Ntk_t * Io_ReadPla( char * pFileName, int fCheck ); /*=== abcWriteBlif.c ==========================================================*/ extern void Io_WriteBlif( Abc_Ntk_t * pNtk, char * pFileName ); extern void Io_WriteTimingInfo( FILE * pFile, Abc_Ntk_t * pNtk ); @@ -65,6 +67,8 @@ extern int Io_WriteBench( Abc_Ntk_t * pNtk, char * FileName ); extern int Io_WriteGate( Abc_Ntk_t * pNtk, char * FileName ); /*=== abcWriteCnf.c ==========================================================*/ extern int Io_WriteCnf( Abc_Ntk_t * pNtk, char * FileName ); +/*=== abcWritePla.c ==========================================================*/ +extern int Io_WritePla( Abc_Ntk_t * pNtk, char * FileName ); //////////////////////////////////////////////////////////////////////// /// END OF FILE /// diff --git a/src/base/io/ioInt.h b/src/base/io/ioInt.h index 69d125fc..736884c4 100644 --- a/src/base/io/ioInt.h +++ b/src/base/io/ioInt.h @@ -17,7 +17,7 @@ Revision [$Id: ioInt.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $] ***********************************************************************/ - + #ifndef __IO_INT_H__ #define __IO_INT_H__ diff --git a/src/base/io/ioRead.c b/src/base/io/ioRead.c index 18e4b153..aef5d57a 100644 --- a/src/base/io/ioRead.c +++ b/src/base/io/ioRead.c @@ -49,6 +49,8 @@ Abc_Ntk_t * Io_Read( char * pFileName, int fCheck ) pNtk = Io_ReadVerilog( pFileName, fCheck ); else if ( Extra_FileNameCheckExtension( pFileName, "bench" ) ) pNtk = Io_ReadBench( pFileName, fCheck ); + else if ( Extra_FileNameCheckExtension( pFileName, "pla" ) ) + pNtk = Io_ReadPla( pFileName, fCheck ); else { fprintf( stderr, "Unknown file format\n" ); diff --git a/src/base/io/ioReadPla.c b/src/base/io/ioReadPla.c new file mode 100644 index 00000000..16b87fc9 --- /dev/null +++ b/src/base/io/ioReadPla.c @@ -0,0 +1,263 @@ +/**CFile**************************************************************** + + FileName [ioReadPla.c] + + SystemName [ABC: Logic synthesis and verification system.] + + PackageName [Command processing package.] + + Synopsis [Procedure to read network from file.] + + Author [Alan Mishchenko] + + Affiliation [UC Berkeley] + + Date [Ver. 1.0. Started - June 20, 2005.] + + Revision [$Id: ioReadPla.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] + +***********************************************************************/ + +#include "io.h" + +//////////////////////////////////////////////////////////////////////// +/// DECLARATIONS /// +//////////////////////////////////////////////////////////////////////// + +static Abc_Ntk_t * Io_ReadPlaNetwork( Extra_FileReader_t * p ); + +//////////////////////////////////////////////////////////////////////// +/// FUNCTION DEFITIONS /// +//////////////////////////////////////////////////////////////////////// + +/**Function************************************************************* + + Synopsis [Read the network from BENCH file.] + + Description [Currently works only for the miter cone.] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +Abc_Ntk_t * Io_ReadPla( char * pFileName, int fCheck ) +{ + Extra_FileReader_t * p; + Abc_Ntk_t * pNtk; + + // start the file + p = Extra_FileReaderAlloc( pFileName, "#", "\n", " \t\r|" ); + if ( p == NULL ) + return NULL; + + // read the network + pNtk = Io_ReadPlaNetwork( p ); + Extra_FileReaderFree( p ); + if ( pNtk == NULL ) + return NULL; + + // make sure that everything is okay with the network structure + if ( fCheck && !Abc_NtkCheck( pNtk ) ) + { + printf( "Io_ReadPla: The network check has failed.\n" ); + Abc_NtkDelete( pNtk ); + return NULL; + } + return pNtk; +} +/**Function************************************************************* + + Synopsis [Read the network from BENCH file.] + + Description [Currently works only for the miter cone.] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +Abc_Ntk_t * Io_ReadPlaNetwork( Extra_FileReader_t * p ) +{ + ProgressBar * pProgress; + Vec_Ptr_t * vTokens; + Abc_Ntk_t * pNtk; + Abc_Obj_t * pNet, * pNode; + Vec_Str_t ** ppSops; + char Buffer[100]; + int nInputs = -1, nOutputs = -1, nProducts = -1; + char * pCubeIn, * pCubeOut; + int i, k, iLine, nDigits, nCubes; + + // allocate the empty network + pNtk = Abc_NtkAlloc( ABC_NTK_NETLIST ); + + // set the specs + pNtk->pName = util_strsav( Extra_FileReaderGetFileName(p) ); + pNtk->pSpec = util_strsav( Extra_FileReaderGetFileName(p) ); + + // go through the lines of the file + nCubes = 0; + pProgress = Extra_ProgressBarStart( stdout, Extra_FileReaderGetFileSize(p) ); + for ( iLine = 0; vTokens = Extra_FileReaderGetTokens(p); iLine++ ) + { + Extra_ProgressBarUpdate( pProgress, Extra_FileReaderGetCurPosition(p), NULL ); + + // if it is the end of file, quit the loop + if ( strcmp( vTokens->pArray[0], ".e" ) == 0 ) + break; + + if ( vTokens->nSize == 1 ) + { + printf( "%s (line %d): Wrong number of token.\n", + Extra_FileReaderGetFileName(p), iLine+1 ); + Abc_NtkDelete( pNtk ); + return NULL; + } + + if ( strcmp( vTokens->pArray[0], ".i" ) == 0 ) + nInputs = atoi(vTokens->pArray[1]); + else if ( strcmp( vTokens->pArray[0], ".o" ) == 0 ) + nOutputs = atoi(vTokens->pArray[1]); + else if ( strcmp( vTokens->pArray[0], ".p" ) == 0 ) + nProducts = atoi(vTokens->pArray[1]); + else if ( strcmp( vTokens->pArray[0], ".ilb" ) == 0 ) + { + if ( vTokens->nSize - 1 != nInputs ) + printf( "Warning: Mismatch between the number of PIs on the .i line (%d) and the number of PIs on the .ilb line (%d).\n", nInputs, vTokens->nSize - 1 ); + for ( i = 1; i < vTokens->nSize; i++ ) + { + pNet = Abc_NtkFindOrCreateNet( pNtk, vTokens->pArray[i] ); + if ( Abc_ObjIsPi(pNet) ) + printf( "Warning: PI net \"%s\" appears twice in the list.\n", vTokens->pArray[1] ); + else + Abc_NtkMarkNetPi( pNet ); + } + } + else if ( strcmp( vTokens->pArray[0], ".ob" ) == 0 ) + { + if ( vTokens->nSize - 1 != nOutputs ) + printf( "Warning: Mismatch between the number of POs on the .o line (%d) and the number of POs on the .ob line (%d).\n", nOutputs, vTokens->nSize - 1 ); + for ( i = 1; i < vTokens->nSize; i++ ) + { + pNet = Abc_NtkFindOrCreateNet( pNtk, vTokens->pArray[i] ); + if ( Abc_ObjIsPo(pNet) ) + printf( "Warning: PO net \"%s\" appears twice in the list.\n", vTokens->pArray[1] ); + else + Abc_NtkMarkNetPo( pNet ); + } + } + else + { + // check if the input/output names are given + if ( Abc_NtkPiNum(pNtk) == 0 ) + { + if ( nInputs == -1 ) + { + printf( "%s: The number of inputs is not specified.\n", Extra_FileReaderGetFileName(p) ); + Abc_NtkDelete( pNtk ); + return NULL; + } + nDigits = Extra_Base10Log( nInputs ); + for ( i = 0; i < nInputs; i++ ) + { + sprintf( Buffer, "x%0*d", nDigits, i ); + pNet = Abc_NtkFindOrCreateNet( pNtk, Buffer ); + Abc_NtkMarkNetPi( pNet ); + } + } + if ( Abc_NtkPoNum(pNtk) == 0 ) + { + if ( nOutputs == -1 ) + { + printf( "%s: The number of outputs is not specified.\n", Extra_FileReaderGetFileName(p) ); + Abc_NtkDelete( pNtk ); + return NULL; + } + nDigits = Extra_Base10Log( nOutputs ); + for ( i = 0; i < nOutputs; i++ ) + { + sprintf( Buffer, "z%0*d", nDigits, i ); + pNet = Abc_NtkFindOrCreateNet( pNtk, Buffer ); + Abc_NtkMarkNetPo( pNet ); + } + } + if ( Abc_NtkNodeNum(pNtk) == 0 ) + { // first time here + // create the PO drivers and add them + // start the SOP covers + ppSops = ALLOC( Vec_Str_t *, nOutputs ); + Abc_NtkForEachPo( pNtk, pNet, i ) + { + ppSops[i] = Vec_StrAlloc( 100 ); + pNode = Abc_NtkCreateNode(pNtk); + for ( k = 0; k < nInputs; k++ ) + Abc_ObjAddFanin( pNode, Abc_NtkPi(pNtk,k) ); + Abc_ObjAddFanin( pNet, pNode ); + } + } + // read the cubes + if ( vTokens->nSize != 2 ) + { + printf( "%s (line %d): Input and output cubes are not specified.\n", + Extra_FileReaderGetFileName(p), iLine+1 ); + Abc_NtkDelete( pNtk ); + return NULL; + } + pCubeIn = vTokens->pArray[0]; + pCubeOut = vTokens->pArray[1]; + if ( strlen(pCubeIn) != (unsigned)nInputs ) + { + printf( "%s (line %d): Input cube length (%d) differs from the number of inputs (%d).\n", + Extra_FileReaderGetFileName(p), iLine+1, strlen(pCubeIn), nInputs ); + Abc_NtkDelete( pNtk ); + return NULL; + } + if ( strlen(pCubeOut) != (unsigned)nOutputs ) + { + printf( "%s (line %d): Output cube length (%d) differs from the number of outputs (%d).\n", + Extra_FileReaderGetFileName(p), iLine+1, strlen(pCubeOut), nOutputs ); + Abc_NtkDelete( pNtk ); + return NULL; + } + for ( i = 0; i < nOutputs; i++ ) + { + if ( pCubeOut[i] == '1' ) + { + Vec_StrAppend( ppSops[i], pCubeIn ); + Vec_StrAppend( ppSops[i], " 1\n" ); + } + } + nCubes++; + } + } + Extra_ProgressBarStop( pProgress ); + if ( nProducts != -1 && nCubes != nProducts ) + printf( "Warning: Mismatch between the number of cubes (%d) and the number on .p line (%d).\n", + nCubes, nProducts ); + + // add the SOP covers + Abc_NtkForEachPo( pNtk, pNet, i ) + { + pNode = Abc_ObjFanin0(pNet); + if ( ppSops[i]->nSize == 0 ) + { + Abc_ObjRemoveFanins(pNode); + pNode->pData = Abc_SopRegister( pNtk->pManFunc, " 0\n" ); + continue; + } + Vec_StrPush( ppSops[i], 0 ); + pNode->pData = Abc_SopRegister( pNtk->pManFunc, ppSops[i]->pArray ); + Vec_StrFree( ppSops[i] ); + } + free( ppSops ); + return pNtk; +} + + +//////////////////////////////////////////////////////////////////////// +/// END OF FILE /// +//////////////////////////////////////////////////////////////////////// + + + diff --git a/src/base/io/ioWriteBench.c b/src/base/io/ioWriteBench.c index 954c2238..0b7591c0 100644 --- a/src/base/io/ioWriteBench.c +++ b/src/base/io/ioWriteBench.c @@ -55,7 +55,7 @@ int Io_WriteBench( Abc_Ntk_t * pNtk, char * pFileName ) fprintf( stdout, "Io_WriteBench(): Cannot open the output file.\n" ); return 0; } - fprintf( pFile, "# Benchmark \"%s\" written by ABC on %s\n", pNtk->pSpec, Extra_TimeStamp() ); + fprintf( pFile, "# Benchmark \"%s\" written by ABC on %s\n", pNtk->pName, Extra_TimeStamp() ); // write the network Io_WriteBenchOne( pFile, pNtk ); // write EXDC network if it exists diff --git a/src/base/io/ioWritePla.c b/src/base/io/ioWritePla.c new file mode 100644 index 00000000..01d2f59b --- /dev/null +++ b/src/base/io/ioWritePla.c @@ -0,0 +1,187 @@ +/**CFile**************************************************************** + + FileName [ioWritePla.c] + + SystemName [ABC: Logic synthesis and verification system.] + + PackageName [Command processing package.] + + Synopsis [Procedures to write the network in BENCH format.] + + Author [Alan Mishchenko] + + Affiliation [UC Berkeley] + + Date [Ver. 1.0. Started - June 20, 2005.] + + Revision [$Id: ioWritePla.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] + +***********************************************************************/ + +#include "io.h" + +//////////////////////////////////////////////////////////////////////// +/// DECLARATIONS /// +//////////////////////////////////////////////////////////////////////// + +static int Io_WritePlaOne( FILE * pFile, Abc_Ntk_t * pNtk ); + +//////////////////////////////////////////////////////////////////////// +/// FUNCTION DEFITIONS /// +//////////////////////////////////////////////////////////////////////// + +/**Function************************************************************* + + Synopsis [Writes the network in BENCH format.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +int Io_WritePla( Abc_Ntk_t * pNtk, char * pFileName ) +{ + Abc_Ntk_t * pExdc; + FILE * pFile; + + assert( Abc_NtkIsLogicSop(pNtk) ); + assert( Abc_NtkGetLevelNum(pNtk) == 1 ); + + pFile = fopen( pFileName, "w" ); + if ( pFile == NULL ) + { + fprintf( stdout, "Io_WritePla(): Cannot open the output file.\n" ); + return 0; + } + fprintf( pFile, "# Benchmark \"%s\" written by ABC on %s\n", pNtk->pName, Extra_TimeStamp() ); + // write the network + Io_WritePlaOne( pFile, pNtk ); + // write EXDC network if it exists + pExdc = Abc_NtkExdc( pNtk ); + if ( pExdc ) + { + printf( "Io_WritePla: EXDC is not written (warning).\n" ); +// fprintf( pFile, "\n" ); +// fprintf( pFile, ".exdc\n" ); +// Io_LogicWriteOne( pFile, pExdc ); + } + // finalize the file + fclose( pFile ); + return 1; +} + +/**Function************************************************************* + + Synopsis [Writes the network in BENCH format.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +int Io_WritePlaOne( FILE * pFile, Abc_Ntk_t * pNtk ) +{ + ProgressBar * pProgress; + Abc_Obj_t * pNode, * pFanin, * pDriver; + char * pCubeIn, * pCubeOut, * pCube; + int i, k, nProducts, nInputs, nOutputs, nFanins; + + nProducts = 0; + Abc_NtkForEachPo( pNtk, pNode, i ) + { + pDriver = Abc_ObjFanin0(pNode); + if ( !Abc_ObjIsNode(pDriver) ) + { + nProducts++; + continue; + } + if ( Abc_NodeIsConst(pDriver) ) + { + if ( Abc_NodeIsConst1(pDriver) ) + nProducts++; + continue; + } + nProducts += Abc_SopGetCubeNum(pDriver->pData); + } + + // collect the parameters + nInputs = Abc_NtkCiNum(pNtk); + nOutputs = Abc_NtkCoNum(pNtk); + pCubeIn = ALLOC( char, nInputs + 1 ); + pCubeOut = ALLOC( char, nOutputs + 1 ); + memset( pCubeIn, '-', nInputs ); pCubeIn[nInputs] = 0; + memset( pCubeOut, '0', nOutputs ); pCubeOut[nOutputs] = 0; + + // write the header + fprintf( pFile, ".i %d\n", nInputs ); + fprintf( pFile, ".o %d\n", nOutputs ); + fprintf( pFile, ".ilb" ); + Abc_NtkForEachCi( pNtk, pNode, i ) + fprintf( pFile, " %s", Abc_NtkNameCi(pNtk, i) ); + fprintf( pFile, "\n" ); + fprintf( pFile, ".ob" ); + Abc_NtkForEachCo( pNtk, pNode, i ) + fprintf( pFile, " %s", Abc_NtkNameCo(pNtk, i) ); + fprintf( pFile, "\n" ); + fprintf( pFile, ".p %d\n", nProducts ); + + // mark the CI nodes + Abc_NtkForEachCi( pNtk, pNode, i ) + pNode->pCopy = (Abc_Obj_t *)i; + + // write the cubes + pProgress = Extra_ProgressBarStart( stdout, nOutputs ); + Abc_NtkForEachCo( pNtk, pNode, i ) + { + // prepare the output cube + if ( i - 1 >= 0 ) + pCubeOut[i-1] = '0'; + pCubeOut[i] = '1'; + + // consider special cases of nodes + pDriver = Abc_ObjFanin0(pNode); + if ( !Abc_ObjIsNode(pDriver) ) + { + pCubeIn[(int)pDriver->pCopy] = '1' - Abc_ObjFaninC0(pNode); + fprintf( pFile, "%s %s\n", pCubeIn, pCubeOut ); + pCubeIn[(int)pDriver->pCopy] = '-'; + continue; + } + if ( Abc_NodeIsConst(pDriver) ) + { + if ( Abc_NodeIsConst1(pDriver) ) + fprintf( pFile, "%s %s\n", pCubeIn, pCubeOut ); + continue; + } + // write the cubes + nFanins = Abc_ObjFaninNum(pDriver); + Abc_SopForEachCube( pDriver->pData, nFanins, pCube ) + { + Abc_ObjForEachFanin( pDriver, pFanin, k ) + pCubeIn[(int)pFanin->pCopy] = pCube[k]; + fprintf( pFile, "%s %s\n", pCubeIn, pCubeOut ); + } + // clean the cube for future writing + Abc_ObjForEachFanin( pDriver, pFanin, k ) + pCubeIn[(int)pFanin->pCopy] = '-'; + Extra_ProgressBarUpdate( pProgress, i, NULL ); + } + Extra_ProgressBarStop( pProgress ); + fprintf( pFile, ".e\n" ); + + // clean the CI nodes + Abc_NtkForEachCi( pNtk, pNode, i ) + pNode->pCopy = NULL; + return 1; +} + + +//////////////////////////////////////////////////////////////////////// +/// END OF FILE /// +//////////////////////////////////////////////////////////////////////// + + diff --git a/src/base/io/module.make b/src/base/io/module.make index d9f46c2c..3e5be57a 100644 --- a/src/base/io/module.make +++ b/src/base/io/module.make @@ -2,9 +2,11 @@ SRC += src/base/io/io.c \ src/base/io/ioRead.c \ src/base/io/ioReadBench.c \ src/base/io/ioReadBlif.c \ + src/base/io/ioReadPla.c \ src/base/io/ioReadVerilog.c \ src/base/io/ioWriteBench.c \ src/base/io/ioWriteBlif.c \ src/base/io/ioWriteBlifLogic.c \ src/base/io/ioWriteCnf.c \ - src/base/io/ioWriteGate.c + src/base/io/ioWriteGate.c \ + src/base/io/ioWritePla.c diff --git a/src/map/mio/mioRead.c b/src/map/mio/mioRead.c index 098cdb50..f2778ca4 100644 --- a/src/map/mio/mioRead.c +++ b/src/map/mio/mioRead.c @@ -17,7 +17,6 @@ ***********************************************************************/ #include "mioInt.h" -#include "ioInt.h" //////////////////////////////////////////////////////////////////////// /// DECLARATIONS /// diff --git a/src/misc/extra/extra.h b/src/misc/extra/extra.h index 568eef7d..5913e40e 100644 --- a/src/misc/extra/extra.h +++ b/src/misc/extra/extra.h @@ -113,6 +113,24 @@ extern DdNode * Extra_bddFindOneCube( DdManager * dd, DdNode * bF ); extern DdNode * Extra_bddGetOneCube( DdManager * dd, DdNode * bFunc ); extern DdNode * Extra_bddComputeRangeCube( DdManager * dd, int iStart, int iStop ); +/*=== extraUtilBitMatrix.c ================================================================*/ + +typedef struct Extra_BitMat_t_ Extra_BitMat_t; +extern Extra_BitMat_t * Extra_BitMatrixStart( int nSize ); +extern void Extra_BitMatrixClean( Extra_BitMat_t * p ); +extern void Extra_BitMatrixStop( Extra_BitMat_t * p ); +extern void Extra_BitMatrixPrint( Extra_BitMat_t * p ); +extern int Extra_BitMatrixReadSize( Extra_BitMat_t * p ); +extern void Extra_BitMatrixInsert1( Extra_BitMat_t * p, int i, int k ); +extern int Extra_BitMatrixLookup1( Extra_BitMat_t * p, int i, int k ); +extern void Extra_BitMatrixDelete1( Extra_BitMat_t * p, int i, int k ); +extern void Extra_BitMatrixInsert2( Extra_BitMat_t * p, int i, int k ); +extern int Extra_BitMatrixLookup2( Extra_BitMat_t * p, int i, int k ); +extern void Extra_BitMatrixDelete2( Extra_BitMat_t * p, int i, int k ); +extern void Extra_BitMatrixOr( Extra_BitMat_t * p, int i, unsigned * pInfo ); +extern void Extra_BitMatrixOrTwo( Extra_BitMat_t * p, int i, int j ); +extern int Extra_BitMatrixCountOnesUpper( Extra_BitMat_t * p ); + /*=== extraUtilFile.c ========================================================*/ extern char * Extra_FileGetSimilarName( char * pFileNameWrong, char * pS1, char * pS2, char * pS3, char * pS4, char * pS5 ); diff --git a/src/misc/extra/extraUtilBitMatrix.c b/src/misc/extra/extraUtilBitMatrix.c new file mode 100644 index 00000000..f0532dba --- /dev/null +++ b/src/misc/extra/extraUtilBitMatrix.c @@ -0,0 +1,359 @@ +/**CFile**************************************************************** + + FileName [extraUtilBitMatrix.c] + + PackageName [extra] + + Synopsis [Various reusable software utilities.] + + Author [Alan Mishchenko] + + Affiliation [UC Berkeley] + + Date [Ver. 1.0. Started - September 1, 2003.] + + Revision [$Id: extraUtilBitMatrix.c,v 1.0 2003/09/01 00:00:00 alanmi Exp $] + +***********************************************************************/ + +#include "extra.h" + +/*---------------------------------------------------------------------------*/ +/* Constant declarations */ +/*---------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------*/ +/* Stucture declarations */ +/*---------------------------------------------------------------------------*/ + +struct Extra_BitMat_t_ +{ + unsigned ** ppData; + int nSize; + int nWords; + int nBitShift; + unsigned uMask; + int nLookups; + int nInserts; + int nDeletes; +}; + +/*---------------------------------------------------------------------------*/ +/* Type declarations */ +/*---------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------*/ +/* Variable declarations */ +/*---------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------*/ +/* Macro declarations */ +/*---------------------------------------------------------------------------*/ + + +/**AutomaticStart*************************************************************/ + +/*---------------------------------------------------------------------------*/ +/* Static function prototypes */ +/*---------------------------------------------------------------------------*/ + +/**AutomaticEnd***************************************************************/ + + +/*---------------------------------------------------------------------------*/ +/* Definition of exported functions */ +/*---------------------------------------------------------------------------*/ + +/**Function************************************************************* + + Synopsis [Starts the bit matrix.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +Extra_BitMat_t * Extra_BitMatrixStart( int nSize ) +{ + Extra_BitMat_t * p; + int i; + p = ALLOC( Extra_BitMat_t, 1 ); + memset( p, 0, sizeof(Extra_BitMat_t) ); + p->nSize = nSize; + p->nBitShift = (sizeof(unsigned) == 4) ? 5: 6; + p->uMask = (sizeof(unsigned) == 4) ? 31: 63; + p->nWords = nSize / (8 * sizeof(unsigned)) + ((nSize % (8 * sizeof(unsigned))) > 0); + p->ppData = ALLOC( unsigned *, nSize ); + p->ppData[0] = ALLOC( unsigned, nSize * p->nWords ); + memset( p->ppData[0], 0, sizeof(unsigned) * nSize * p->nWords ); + for ( i = 1; i < nSize; i++ ) + p->ppData[i] = p->ppData[i-1] + p->nWords; + return p; +} + +/**Function************************************************************* + + Synopsis [Stops the bit matrix.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Extra_BitMatrixClean( Extra_BitMat_t * p ) +{ + memset( p->ppData[0], 0, sizeof(unsigned) * p->nSize * p->nWords ); +} + +/**Function************************************************************* + + Synopsis [Stops the bit matrix.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Extra_BitMatrixStop( Extra_BitMat_t * p ) +{ + FREE( p->ppData[0] ); + FREE( p->ppData ); + FREE( p ); +} + +/**Function************************************************************* + + Synopsis [Prints the bit-matrix.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Extra_BitMatrixPrint( Extra_BitMat_t * pMat ) +{ + int i, k, nVars; + printf( "\n" ); + nVars = Extra_BitMatrixReadSize( pMat ); + for ( i = 0; i < nVars; i++ ) + { + for ( k = 0; k <= i; k++ ) + printf( " " ); + for ( k = i+1; k < nVars; k++ ) + if ( Extra_BitMatrixLookup1( pMat, i, k ) ) + printf( "1" ); + else + printf( "." ); + printf( "\n" ); + } +} + + +/**Function************************************************************* + + Synopsis [Reads the matrix size.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +int Extra_BitMatrixReadSize( Extra_BitMat_t * p ) +{ + return p->nSize; +} + +/**Function************************************************************* + + Synopsis [Inserts the element into the upper part.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Extra_BitMatrixInsert1( Extra_BitMat_t * p, int i, int k ) +{ + p->nInserts++; + if ( i < k ) + p->ppData[i][k>>p->nBitShift] |= (1<<(k & p->uMask)); + else + p->ppData[k][i>>p->nBitShift] |= (1<<(i & p->uMask)); +} + +/**Function************************************************************* + + Synopsis [Inserts the element into the upper part.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +int Extra_BitMatrixLookup1( Extra_BitMat_t * p, int i, int k ) +{ + p->nLookups++; + if ( i < k ) + return ((p->ppData[i][k>>p->nBitShift] & (1<<(k & p->uMask))) > 0); + else + return ((p->ppData[k][i>>p->nBitShift] & (1<<(i & p->uMask))) > 0); +} + +/**Function************************************************************* + + Synopsis [Inserts the element into the upper part.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Extra_BitMatrixDelete1( Extra_BitMat_t * p, int i, int k ) +{ + p->nDeletes++; + if ( i < k ) + p->ppData[i][k>>p->nBitShift] &= ~(1<<(k & p->uMask)); + else + p->ppData[k][i>>p->nBitShift] &= ~(1<<(i & p->uMask)); +} + + + +/**Function************************************************************* + + Synopsis [Inserts the element into the upper part.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Extra_BitMatrixInsert2( Extra_BitMat_t * p, int i, int k ) +{ + p->nInserts++; + if ( i > k ) + p->ppData[i][k>>p->nBitShift] |= (1<<(k & p->uMask)); + else + p->ppData[k][i>>p->nBitShift] |= (1<<(i & p->uMask)); +} + +/**Function************************************************************* + + Synopsis [Inserts the element into the upper part.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +int Extra_BitMatrixLookup2( Extra_BitMat_t * p, int i, int k ) +{ + p->nLookups++; + if ( i > k ) + return ((p->ppData[i][k>>p->nBitShift] & (1<<(k & p->uMask))) > 0); + else + return ((p->ppData[k][i>>p->nBitShift] & (1<<(i & p->uMask))) > 0); +} + +/**Function************************************************************* + + Synopsis [Inserts the element into the upper part.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Extra_BitMatrixDelete2( Extra_BitMat_t * p, int i, int k ) +{ + p->nDeletes++; + if ( i > k ) + p->ppData[i][k>>p->nBitShift] &= ~(1<<(k & p->uMask)); + else + p->ppData[k][i>>p->nBitShift] &= ~(1<<(i & p->uMask)); +} + + +/**Function************************************************************* + + Synopsis [Inserts the element into the upper part.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Extra_BitMatrixOr( Extra_BitMat_t * p, int i, unsigned * pInfo ) +{ + int w; + for ( w = 0; w < p->nWords; w++ ) + p->ppData[i][w] |= pInfo[w]; +} + +/**Function************************************************************* + + Synopsis [Inserts the element into the upper part.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Extra_BitMatrixOrTwo( Extra_BitMat_t * p, int i, int j ) +{ + int w; + for ( w = 0; w < p->nWords; w++ ) + p->ppData[i][w] = p->ppData[j][w] = (p->ppData[i][w] | p->ppData[j][w]); +} + +/**Function************************************************************* + + Synopsis [Counts the number of 1's in the upper rectangle.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +int Extra_BitMatrixCountOnesUpper( Extra_BitMat_t * p ) +{ + int i, k, nTotal = 0; + for ( i = 0; i < p->nSize; i++ ) + for ( k = i + 1; k < p->nSize; k++ ) + nTotal += ( (p->ppData[i][k/32] & (1 << (k%32))) > 0 ); + return nTotal; +} + +//////////////////////////////////////////////////////////////////////// +/// END OF FILE /// +//////////////////////////////////////////////////////////////////////// + + diff --git a/src/misc/extra/module.make b/src/misc/extra/module.make index 0c7d36a2..bfc9d0ad 100644 --- a/src/misc/extra/module.make +++ b/src/misc/extra/module.make @@ -1,4 +1,5 @@ SRC += src/misc/extra/extraUtilBdd.c \ + src/misc/extra/extraUtilBitMatrix.c \ src/misc/extra/extraUtilFile.c \ src/misc/extra/extraUtilMemory.c \ src/misc/extra/extraUtilMisc.c \ diff --git a/src/misc/vec/vecInt.h b/src/misc/vec/vecInt.h index 975b61cf..76fce02e 100644 --- a/src/misc/vec/vecInt.h +++ b/src/misc/vec/vecInt.h @@ -428,6 +428,29 @@ static inline int Vec_IntPop( Vec_Int_t * p ) return p->pArray[--p->nSize]; } +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +static inline void Vec_IntRemove( Vec_Int_t * p, int Entry ) +{ + int i; + for ( i = 0; i < p->nSize; i++ ) + if ( p->pArray[i] == Entry ) + break; + assert( i < p->nSize ); + for ( i++; i < p->nSize; i++ ) + p->pArray[i-1] = p->pArray[i]; + p->nSize--; +} + /**Function************************************************************* Synopsis [Comparison procedure for two integers.] diff --git a/src/misc/vec/vecPtr.h b/src/misc/vec/vecPtr.h index eb551d1c..3914cf99 100644 --- a/src/misc/vec/vecPtr.h +++ b/src/misc/vec/vecPtr.h @@ -51,6 +51,10 @@ struct Vec_Ptr_t_ #define Vec_PtrForEachEntry( vVec, pEntry, i ) \ for ( i = 0; (i < Vec_PtrSize(vVec)) && (((pEntry) = Vec_PtrEntry(vVec, i)), 1); i++ ) +#define Vec_PtrForEachEntryByLevel( vVec, pEntry, i, k ) \ + for ( i = 0; i < Vec_PtrSize(vVec); i++ ) \ + Vec_PtrForEachEntry( ((Vec_Ptr_t *)Vec_PtrEntry(vVec, i)), pEntry, k ) + //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFITIONS /// //////////////////////////////////////////////////////////////////////// @@ -169,7 +173,7 @@ static inline Vec_Ptr_t * Vec_PtrDupArray( Vec_Ptr_t * pVec ) /**Function************************************************************* - Synopsis [] + Synopsis [Frees the vector.] Description [] @@ -461,6 +465,46 @@ static inline void Vec_PtrReorder( Vec_Ptr_t * p, int nItems ) memmove( p->pArray, (char **)p->pArray + nItems, p->nSize * sizeof(void*) ); } +/**Function************************************************************* + + Synopsis [Frees the vector of vectors.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +static inline void Vec_PtrFreeFree( Vec_Ptr_t * p ) +{ + Vec_Ptr_t * vVec; + int i; + Vec_PtrForEachEntry( p, vVec, i ) + Vec_PtrFree( vVec ); + Vec_PtrFree( p ); +} + +/**Function************************************************************* + + Synopsis [Frees the vector of vectors.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +static inline int Vec_PtrSizeSize( Vec_Ptr_t * p ) +{ + Vec_Ptr_t * vVec; + int i, Counter = 0; + Vec_PtrForEachEntry( p, vVec, i ) + Counter += vVec->nSize; + return Counter; +} + /**Function************************************************************* Synopsis [Sorting the entries by their integer value.] diff --git a/src/misc/vec/vecStr.h b/src/misc/vec/vecStr.h index 33be5f1d..2a9dc7a0 100644 --- a/src/misc/vec/vecStr.h +++ b/src/misc/vec/vecStr.h @@ -301,8 +301,8 @@ static inline void Vec_StrGrow( Vec_Str_t * p, int nCapMin ) { if ( p->nCap >= nCapMin ) return; - p->pArray = REALLOC( char, p->pArray, nCapMin ); - p->nCap = nCapMin; + p->pArray = REALLOC( char, p->pArray, 2 * nCapMin ); + p->nCap = 2 * nCapMin; } /**Function************************************************************* @@ -381,6 +381,26 @@ static inline void Vec_StrPush( Vec_Str_t * p, char Entry ) p->pArray[p->nSize++] = Entry; } +/**Function************************************************************* + + Synopsis [Appends the string to the char vector.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +static inline void Vec_StrAppend( Vec_Str_t * p, char * pString ) +{ + int i, nLength = strlen(pString); + Vec_StrGrow( p, p->nSize + nLength ); + for ( i = 0; i < nLength; i++ ) + p->pArray[p->nSize + i] = pString[i]; + p->nSize += nLength; +} + /**Function************************************************************* Synopsis [Returns the last entry and removes it from the list.] diff --git a/src/sat/sim/sim.h b/src/sat/sim/sim.h new file mode 100644 index 00000000..7c4c50e3 --- /dev/null +++ b/src/sat/sim/sim.h @@ -0,0 +1,136 @@ +/**CFile**************************************************************** + + FileName [sim.h] + + SystemName [ABC: Logic synthesis and verification system.] + + PackageName [Simulation package.] + + Synopsis [External declarations.] + + Author [Alan Mishchenko] + + Affiliation [UC Berkeley] + + Date [Ver. 1.0. Started - June 20, 2005.] + + Revision [$Id: sim.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $] + +***********************************************************************/ + +#ifndef __SIM_H__ +#define __SIM_H__ + +//////////////////////////////////////////////////////////////////////// +/// INCLUDES /// +//////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////// +/// PARAMETERS /// +//////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////// +/// BASIC TYPES /// +//////////////////////////////////////////////////////////////////////// + +typedef struct Sim_Man_t_ Sim_Man_t; +struct Sim_Man_t_ +{ + // user specified parameters + Abc_Ntk_t * pNtk; + // internal simulation information + int nSimBits; // the number of bits in simulation info + int nSimWords; // the number of words in simulation info + Vec_Ptr_t * vSim0; // simulation info 1 + Vec_Ptr_t * vSim1; // simulation info 2 + // support information + int nSuppBits; // the number of bits in support info + int nSuppWords; // the number of words in support info + Vec_Ptr_t * vSuppStr; // structural supports + Vec_Ptr_t * vSuppFun; // functional supports + // unateness info + Vec_Ptr_t * vUnateVarsP; // unate variables + Vec_Ptr_t * vUnateVarsN; // unate variables + // symmtry info + Extra_BitMat_t * pMatSym; // symmetric pairs + Extra_BitMat_t * pMatNonSym; // non-symmetric pairs + // simulation targets + Vec_Ptr_t * vSuppTargs; // support targets + Vec_Ptr_t * vUnateTargs; // unateness targets + Vec_Ptr_t * vSymmTargs; // symmetry targets + // internal data structures + Extra_MmFixed_t * pMmPat; + Vec_Ptr_t * vFifo; + Vec_Int_t * vDiffs; + // runtime statistics + int time1; + int time2; + int time3; + int time4; +}; + +typedef struct Sim_Pat_t_ Sim_Pat_t; +struct Sim_Pat_t_ +{ + int Input; // the input which it has detected + int Output; // the output for which it was collected + unsigned * pData; // the simulation data +}; + +//////////////////////////////////////////////////////////////////////// +/// MACRO DEFITIONS /// +//////////////////////////////////////////////////////////////////////// + +#define SIM_NUM_WORDS(n) ((n)/32 + (((n)%32) > 0)) +#define SIM_LAST_BITS(n) ((((n)%32) > 0)? (n)%32 : 32) + +// generating random unsigned (#define RAND_MAX 0x7fff) +#define SIM_RANDOM_UNSIGNED ((((unsigned)rand()) << 24) ^ (((unsigned)rand()) << 12) ^ ((unsigned)rand())) + +// macros to get hold of bits in a bit string +#define Sim_SetBit(p,i) ((p)[(i)>>5] |= (1<<((i) & 31))) +#define Sim_XorBit(p,i) ((p)[(i)>>5] ^= (1<<((i) & 31))) +#define Sim_HasBit(p,i) (((p)[(i)>>5] & (1<<((i) & 31))) > 0) + +// macros to get hold of the support info +#define Sim_SuppStrSetVar(pMan,pNode,v) Sim_SetBit((unsigned*)pMan->vSuppStr->pArray[(pNode)->Id],(v)) +#define Sim_SuppStrHasVar(pMan,pNode,v) Sim_HasBit((unsigned*)pMan->vSuppStr->pArray[(pNode)->Id],(v)) +#define Sim_SuppFunSetVar(pMan,Output,v) Sim_SetBit((unsigned*)pMan->vSuppFun->pArray[Output],(v)) +#define Sim_SuppFunHasVar(pMan,Output,v) Sim_HasBit((unsigned*)pMan->vSuppFun->pArray[Output],(v)) +#define Sim_SimInfoSetVar(pMan,pNode,v) Sim_SetBit((unsigned*)pMan->vSim0->pArray[(pNode)->Id],(v)) +#define Sim_SimInfoHasVar(pMan,pNode,v) Sim_HasBit((unsigned*)pMan->vSim0->pArray[(pNode)->Id],(v)) + +//////////////////////////////////////////////////////////////////////// +/// FUNCTION DECLARATIONS /// +//////////////////////////////////////////////////////////////////////// + +/*=== simMan.c ==========================================================*/ +extern Sim_Man_t * Sim_ManStart( Abc_Ntk_t * pNtk ); +extern void Sim_ManStop( Sim_Man_t * p ); +extern Sim_Pat_t * Sim_ManPatAlloc( Sim_Man_t * p ); +extern void Sim_ManPatFree( Sim_Man_t * p, Sim_Pat_t * pPat ); +extern void Sim_ManPrintStats( Sim_Man_t * p ); + +/*=== simSupp.c ==========================================================*/ +extern Sim_Man_t * Sim_ComputeSupp( Abc_Ntk_t * pNtk ); + +/*=== simUtil.c ==========================================================*/ +extern Vec_Ptr_t * Sim_UtilInfoAlloc( int nSize, int nWords, bool fClean ); +extern void Sim_UtilInfoFree( Vec_Ptr_t * p ); +extern void Sim_UtilInfoAdd( unsigned * pInfo1, unsigned * pInfo2, int nWords ); +extern void Sim_UtilInfoDetectDiffs( unsigned * pInfo1, unsigned * pInfo2, int nWords, Vec_Int_t * vDiffs ); +extern void Sim_UtilInfoDetectNews( unsigned * pInfo1, unsigned * pInfo2, int nWords, Vec_Int_t * vDiffs ); +extern void Sim_UtilComputeStrSupp( Sim_Man_t * p ); +extern void Sim_UtilAssignRandom( Sim_Man_t * p ); +extern void Sim_UtilFlipSimInfo( Sim_Man_t * p, Abc_Obj_t * pNode ); +extern bool Sim_UtilCompareSimInfo( Sim_Man_t * p, Abc_Obj_t * pNode ); +extern void Sim_UtilSimulate( Sim_Man_t * p, bool fFirst ); +extern void Sim_UtilSimulateNode( Sim_Man_t * p, Abc_Obj_t * pNode, bool fType, bool fType1, bool fType2 ); +extern int Sim_UtilCountSuppSizes( Sim_Man_t * p, int fStruct ); + +//////////////////////////////////////////////////////////////////////// +/// END OF FILE /// +//////////////////////////////////////////////////////////////////////// + +#endif + diff --git a/src/sat/sim/simMan.c b/src/sat/sim/simMan.c new file mode 100644 index 00000000..dbc4fc5c --- /dev/null +++ b/src/sat/sim/simMan.c @@ -0,0 +1,166 @@ +/**CFile**************************************************************** + + FileName [simMan.c] + + SystemName [ABC: Logic synthesis and verification system.] + + PackageName [Network and node package.] + + Synopsis [Simulation manager.] + + Author [Alan Mishchenko] + + Affiliation [UC Berkeley] + + Date [Ver. 1.0. Started - June 20, 2005.] + + Revision [$Id: simMan.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] + +***********************************************************************/ + +#include "abc.h" +#include "sim.h" + +//////////////////////////////////////////////////////////////////////// +/// DECLARATIONS /// +//////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////// +/// FUNCTION DEFITIONS /// +//////////////////////////////////////////////////////////////////////// + +/**Function************************************************************* + + Synopsis [Starts the simulatin manager.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +Sim_Man_t * Sim_ManStart( Abc_Ntk_t * pNtk ) +{ + Sim_Man_t * p; + int i; + // start the manager + p = ALLOC( Sim_Man_t, 1 ); + memset( p, 0, sizeof(Sim_Man_t) ); + p->pNtk = pNtk; + // internal simulation information + p->nSimBits = 2048; + p->nSimWords = SIM_NUM_WORDS(p->nSimBits); + p->vSim0 = Sim_UtilInfoAlloc( pNtk->vObjs->nSize, p->nSimWords, 0 ); + p->vSim1 = Sim_UtilInfoAlloc( pNtk->vObjs->nSize, p->nSimWords, 0 ); + // support information + p->nSuppBits = Abc_NtkCiNum(pNtk); + p->nSuppWords = SIM_NUM_WORDS(p->nSuppBits); + p->vSuppStr = Sim_UtilInfoAlloc( pNtk->vObjs->nSize, p->nSuppWords, 1 ); + p->vSuppFun = Sim_UtilInfoAlloc( Abc_NtkCoNum(p->pNtk), p->nSuppWords, 1 ); + // other data + p->pMmPat = Extra_MmFixedStart( sizeof(Sim_Pat_t) + p->nSuppWords * sizeof(unsigned) ); + p->vFifo = Vec_PtrAlloc( 100 ); + p->vDiffs = Vec_IntAlloc( 100 ); + // allocate support targets + p->vSuppTargs = Vec_PtrAlloc( p->nSuppBits ); + p->vSuppTargs->nSize = p->nSuppBits; + for ( i = 0; i < p->nSuppBits; i++ ) + p->vSuppTargs->pArray[i] = Vec_IntAlloc( 8 ); + return p; +} + +/**Function************************************************************* + + Synopsis [Stops the simulatin manager.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Sim_ManStop( Sim_Man_t * p ) +{ + Sim_ManPrintStats( p ); + if ( p->vSim0 ) Sim_UtilInfoFree( p->vSim0 ); + if ( p->vSim1 ) Sim_UtilInfoFree( p->vSim1 ); + if ( p->vSuppStr ) Sim_UtilInfoFree( p->vSuppStr ); + if ( p->vSuppFun ) Sim_UtilInfoFree( p->vSuppFun ); + if ( p->vUnateVarsP ) Sim_UtilInfoFree( p->vUnateVarsP ); + if ( p->vUnateVarsN ) Sim_UtilInfoFree( p->vUnateVarsN ); + if ( p->pMatSym ) Extra_BitMatrixStop( p->pMatSym ); + if ( p->pMatNonSym ) Extra_BitMatrixStop( p->pMatNonSym ); + if ( p->vSuppTargs ) Vec_PtrFreeFree( p->vSuppTargs ); + if ( p->vUnateTargs ) Vec_PtrFree( p->vUnateTargs ); + if ( p->vSymmTargs ) Vec_PtrFree( p->vSymmTargs ); + if ( p->pMmPat ) Extra_MmFixedStop( p->pMmPat, 0 ); + if ( p->vFifo ) Vec_PtrFree( p->vFifo ); + if ( p->vDiffs ) Vec_IntFree( p->vDiffs ); + free( p ); +} + +/**Function************************************************************* + + Synopsis [Returns one simulation pattern.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +Sim_Pat_t * Sim_ManPatAlloc( Sim_Man_t * p ) +{ + Sim_Pat_t * pPat; + pPat = (Sim_Pat_t *)Extra_MmFixedEntryFetch( p->pMmPat ); + pPat->Output = -1; + pPat->pData = (unsigned *)((char *)pPat + sizeof(Sim_Pat_t)); + memset( pPat->pData, 0, p->nSuppWords * sizeof(unsigned) ); + return pPat; +} + +/**Function************************************************************* + + Synopsis [Returns one simulation pattern.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Sim_ManPatFree( Sim_Man_t * p, Sim_Pat_t * pPat ) +{ + Extra_MmFixedEntryRecycle( p->pMmPat, (char *)pPat ); +} + +/**Function************************************************************* + + Synopsis [Prints the manager statisticis.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Sim_ManPrintStats( Sim_Man_t * p ) +{ + printf( "Inputs = %d. Outputs = %d. Sim words = %d.\n", + Abc_NtkCiNum(p->pNtk), Abc_NtkCoNum(p->pNtk), p->nSimWords ); + printf( "Total struct supps = %6d.\n", Sim_UtilCountSuppSizes(p, 1) ); + printf( "Total func supps = %6d.\n", Sim_UtilCountSuppSizes(p, 0) ); + printf( "Total targets = %6d.\n", Vec_PtrSizeSize(p->vSuppTargs) ); + printf( "Total sim patterns = %6d.\n", Vec_PtrSize(p->vFifo) ); +} + +//////////////////////////////////////////////////////////////////////// +/// END OF FILE /// +//////////////////////////////////////////////////////////////////////// + + diff --git a/src/sat/sim/simSat.c b/src/sat/sim/simSat.c new file mode 100644 index 00000000..b4e080fe --- /dev/null +++ b/src/sat/sim/simSat.c @@ -0,0 +1,48 @@ +/**CFile**************************************************************** + + FileName [simSat.c] + + SystemName [ABC: Logic synthesis and verification system.] + + PackageName [Network and node package.] + + Synopsis [Simulation to determine functional support.] + + Author [Alan Mishchenko] + + Affiliation [UC Berkeley] + + Date [Ver. 1.0. Started - June 20, 2005.] + + Revision [$Id: simSat.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] + +***********************************************************************/ + +#include "abc.h" +#include "sim.h" + +//////////////////////////////////////////////////////////////////////// +/// DECLARATIONS /// +//////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////// +/// FUNCTION DEFITIONS /// +//////////////////////////////////////////////////////////////////////// + +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ + +//////////////////////////////////////////////////////////////////////// +/// END OF FILE /// +//////////////////////////////////////////////////////////////////////// + + diff --git a/src/sat/sim/simSupp.c b/src/sat/sim/simSupp.c new file mode 100644 index 00000000..9f747e0f --- /dev/null +++ b/src/sat/sim/simSupp.c @@ -0,0 +1,265 @@ +/**CFile**************************************************************** + + FileName [simSupp.c] + + SystemName [ABC: Logic synthesis and verification system.] + + PackageName [Network and node package.] + + Synopsis [Simulation to determine functional support.] + + Author [Alan Mishchenko] + + Affiliation [UC Berkeley] + + Date [Ver. 1.0. Started - June 20, 2005.] + + Revision [$Id: simSupp.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] + +***********************************************************************/ + +#include "abc.h" +#include "sim.h" + +//////////////////////////////////////////////////////////////////////// +/// DECLARATIONS /// +//////////////////////////////////////////////////////////////////////// + +static int Sim_ComputeSuppRound( Sim_Man_t * p, bool fUseTargets ); +static int Sim_ComputeSuppRoundNode( Sim_Man_t * p, int iNumCi, bool fUseTargets ); +static void Sim_ComputeSuppSetTargets( Sim_Man_t * p ); +static void Sim_UtilAssignFromFifo( Sim_Man_t * p ); + +//////////////////////////////////////////////////////////////////////// +/// FUNCTION DEFITIONS /// +//////////////////////////////////////////////////////////////////////// + +/**Function************************************************************* + + Synopsis [Compute functional supports of the primary outputs.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +Sim_Man_t * Sim_ComputeSupp( Abc_Ntk_t * pNtk ) +{ + Sim_Man_t * p; + int i, nSolved; + +// srand( time(NULL) ); + srand( 0xedfeedfe ); + + // start the simulation manager + p = Sim_ManStart( pNtk ); + Sim_UtilComputeStrSupp( p ); + + // compute functional support using one round of random simulation + Sim_UtilAssignRandom( p ); + Sim_ComputeSuppRound( p, 0 ); + + // set the support targets + Sim_ComputeSuppSetTargets( p ); +printf( "Initial targets = %5d.\n", Vec_PtrSizeSize(p->vSuppTargs) ); + if ( Vec_PtrSizeSize(p->vSuppTargs) == 0 ) + goto exit; + + // compute patterns using one round of random simulation + Sim_UtilAssignRandom( p ); + nSolved = Sim_ComputeSuppRound( p, 1 ); +printf( "First step targets = %5d. Solved = %5d.\n", Vec_PtrSizeSize(p->vSuppTargs), nSolved ); + if ( Vec_PtrSizeSize(p->vSuppTargs) == 0 ) + goto exit; + + // simulate until saturation + for ( i = 0; i < 10; i++ ) + { + // compute additional functional support +// Sim_UtilAssignFromFifo( p ); + Sim_UtilAssignRandom( p ); + nSolved = Sim_ComputeSuppRound( p, 1 ); +printf( "Next step targets = %5d. Solved = %5d.\n", Vec_PtrSizeSize(p->vSuppTargs), nSolved ); + if ( Vec_PtrSizeSize(p->vSuppTargs) == 0 ) + goto exit; + } + +exit: +// return p; + Sim_ManStop( p ); + return NULL; +} + +/**Function************************************************************* + + Synopsis [Computes functional support using one round of simulation.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +int Sim_ComputeSuppRound( Sim_Man_t * p, bool fUseTargets ) +{ + Vec_Int_t * vTargets; + Abc_Obj_t * pNode; + int i, Counter = 0; + // perform one round of random simulation + Sim_UtilSimulate( p, 0 ); + // iterate through the CIs and detect COs that depend on them + Abc_NtkForEachCi( p->pNtk, pNode, i ) + { + vTargets = p->vSuppTargs->pArray[i]; + if ( fUseTargets && vTargets->nSize == 0 ) + continue; + Counter += Sim_ComputeSuppRoundNode( p, i, fUseTargets ); + } + return Counter; +} + +/**Function************************************************************* + + Synopsis [Computes functional support for one node.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +int Sim_ComputeSuppRoundNode( Sim_Man_t * p, int iNumCi, bool fUseTargets ) +{ + Sim_Pat_t * pPat; + Vec_Int_t * vTargets; + Vec_Ptr_t * vNodesByLevel; + Abc_Obj_t * pNodeCi, * pNode; + int i, k, v, Output, LuckyPat, fType0, fType1; + int Counter = 0; + // collect nodes by level in the TFO of the CI + // (this procedure increments TravId of the collected nodes) + pNodeCi = Abc_NtkCi( p->pNtk, iNumCi ); + vNodesByLevel = Abc_DfsLevelized( pNodeCi, 0 ); + // complement the simulation info of the selected CI + Sim_UtilFlipSimInfo( p, pNodeCi ); + // simulate the levelized structure of nodes + Vec_PtrForEachEntryByLevel( vNodesByLevel, pNode, i, k ) + { + fType0 = Abc_NodeIsTravIdCurrent( Abc_ObjFanin0(pNode) ); + fType1 = Abc_NodeIsTravIdCurrent( Abc_ObjFanin1(pNode) ); + Sim_UtilSimulateNode( p, pNode, 1, fType0, fType1 ); + } + // set the simulation info of the affected COs + if ( fUseTargets ) + { + vTargets = p->vSuppTargs->pArray[iNumCi]; + for ( i = vTargets->nSize - 1; i >= 0; i-- ) + { + // get the target output + Output = vTargets->pArray[i]; + // get the target node + pNode = Abc_NtkCo( p->pNtk, Output ); + // the output should be in the cone + assert( Abc_NodeIsTravIdCurrent(pNode) ); + + // simulate the node + Sim_UtilSimulateNode( p, pNode, 1, 1, 1 ); + + // skip if the simulation info is equal + if ( Sim_UtilCompareSimInfo( p, pNode ) ) + continue; + + // otherwise, we solved a new target + Vec_IntRemove( vTargets, Output ); + Counter++; + // make sure this variable is not yet detected + assert( !Sim_SuppFunHasVar(p, Output, iNumCi) ); + // set this variable + Sim_SuppFunSetVar( p, Output, iNumCi ); + + // detect the differences in the simulation info + Sim_UtilInfoDetectDiffs( p->vSim0->pArray[pNode->Id], p->vSim1->pArray[pNode->Id], p->nSimWords, p->vDiffs ); + // create patterns + Vec_IntForEachEntry( p->vDiffs, LuckyPat, k ) + { + // set the new pattern + pPat = Sim_ManPatAlloc( p ); + pPat->Input = iNumCi; + pPat->Output = Output; + Abc_NtkForEachCi( p->pNtk, pNodeCi, v ) + if ( Sim_SimInfoHasVar( p, pNodeCi, LuckyPat ) ) + Sim_SetBit( pPat->pData, v ); + Vec_PtrPush( p->vFifo, pPat ); + } + } + } + else + { + Abc_NtkForEachCo( p->pNtk, pNode, Output ) + { + if ( !Abc_NodeIsTravIdCurrent( pNode ) ) + continue; + Sim_UtilSimulateNode( p, pNode, 1, 1, 1 ); + if ( !Sim_UtilCompareSimInfo( p, pNode ) ) + { + if ( !Sim_SuppFunHasVar(p, Output, iNumCi) ) + Counter++; + Sim_SuppFunSetVar( p, Output, iNumCi ); + } + } + } + Vec_PtrFreeFree( vNodesByLevel ); + return Counter; +} + +/**Function************************************************************* + + Synopsis [Sets the simulation targets.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Sim_ComputeSuppSetTargets( Sim_Man_t * p ) +{ + Abc_Obj_t * pNode; + unsigned * pSuppStr, * pSuppFun; + int i, k, Num; + Abc_NtkForEachCo( p->pNtk, pNode, i ) + { + pSuppStr = p->vSuppStr->pArray[pNode->Id]; + pSuppFun = p->vSuppFun->pArray[i]; + // find vars in the structural support that are not in the functional support + Sim_UtilInfoDetectNews( pSuppFun, pSuppStr, p->nSuppWords, p->vDiffs ); + Vec_IntForEachEntry( p->vDiffs, Num, k ) + Vec_IntPush( p->vSuppTargs->pArray[Num], i ); + } +} + +/**Function************************************************************* + + Synopsis [Sets the new patterns from fifo.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Sim_UtilAssignFromFifo( Sim_Man_t * p ) +{ +} + +//////////////////////////////////////////////////////////////////////// +/// END OF FILE /// +//////////////////////////////////////////////////////////////////////// + + diff --git a/src/sat/sim/simSym.c b/src/sat/sim/simSym.c new file mode 100644 index 00000000..6b8bdaa3 --- /dev/null +++ b/src/sat/sim/simSym.c @@ -0,0 +1,48 @@ +/**CFile**************************************************************** + + FileName [simSym.c] + + SystemName [ABC: Logic synthesis and verification system.] + + PackageName [Network and node package.] + + Synopsis [Simulation to determine two-variable symmetries.] + + Author [Alan Mishchenko] + + Affiliation [UC Berkeley] + + Date [Ver. 1.0. Started - June 20, 2005.] + + Revision [$Id: simSym.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] + +***********************************************************************/ + +#include "abc.h" +#include "sim.h" + +//////////////////////////////////////////////////////////////////////// +/// DECLARATIONS /// +//////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////// +/// FUNCTION DEFITIONS /// +//////////////////////////////////////////////////////////////////////// + +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ + +//////////////////////////////////////////////////////////////////////// +/// END OF FILE /// +//////////////////////////////////////////////////////////////////////// + + diff --git a/src/sat/sim/simUnate.c b/src/sat/sim/simUnate.c new file mode 100644 index 00000000..f7ad3557 --- /dev/null +++ b/src/sat/sim/simUnate.c @@ -0,0 +1,48 @@ +/**CFile**************************************************************** + + FileName [simUnate.c] + + SystemName [ABC: Logic synthesis and verification system.] + + PackageName [Network and node package.] + + Synopsis [Simulation to determine unateness of variables.] + + Author [Alan Mishchenko] + + Affiliation [UC Berkeley] + + Date [Ver. 1.0. Started - June 20, 2005.] + + Revision [$Id: simUnate.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] + +***********************************************************************/ + +#include "abc.h" +#include "sim.h" + +//////////////////////////////////////////////////////////////////////// +/// DECLARATIONS /// +//////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////// +/// FUNCTION DEFITIONS /// +//////////////////////////////////////////////////////////////////////// + +/**Function************************************************************* + + Synopsis [] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ + +//////////////////////////////////////////////////////////////////////// +/// END OF FILE /// +//////////////////////////////////////////////////////////////////////// + + diff --git a/src/sat/sim/simUtils.c b/src/sat/sim/simUtils.c new file mode 100644 index 00000000..5f5708f2 --- /dev/null +++ b/src/sat/sim/simUtils.c @@ -0,0 +1,379 @@ +/**CFile**************************************************************** + + FileName [simUtils.c] + + SystemName [ABC: Logic synthesis and verification system.] + + PackageName [Network and node package.] + + Synopsis [Various simulation utilities.] + + Author [Alan Mishchenko] + + Affiliation [UC Berkeley] + + Date [Ver. 1.0. Started - June 20, 2005.] + + Revision [$Id: simUtils.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] + +***********************************************************************/ + +#include "abc.h" +#include "sim.h" + +//////////////////////////////////////////////////////////////////////// +/// DECLARATIONS /// +//////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////// +/// FUNCTION DEFITIONS /// +//////////////////////////////////////////////////////////////////////// + +/**Function************************************************************* + + Synopsis [Allocates simulation information for all nodes.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +Vec_Ptr_t * Sim_UtilInfoAlloc( int nSize, int nWords, bool fClean ) +{ + Vec_Ptr_t * vInfo; + int i; + vInfo = Vec_PtrAlloc( nSize ); + vInfo->pArray[0] = ALLOC( unsigned, nSize * nWords ); + if ( fClean ) + memset( vInfo->pArray[0], 0, sizeof(unsigned) * nSize * nWords ); + for ( i = 1; i < nSize; i++ ) + vInfo->pArray[i] = ((unsigned *)vInfo->pArray[i-1]) + nWords; + vInfo->nSize = nSize; + return vInfo; +} + +/**Function************************************************************* + + Synopsis [Allocates simulation information for all nodes.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Sim_UtilInfoFree( Vec_Ptr_t * p ) +{ + free( p->pArray[0] ); + Vec_PtrFree( p ); +} + +/**Function************************************************************* + + Synopsis [Adds the second supp-info the first.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Sim_UtilInfoAdd( unsigned * pInfo1, unsigned * pInfo2, int nWords ) +{ + int w; + for ( w = 0; w < nWords; w++ ) + pInfo1[w] |= pInfo2[w]; +} + +/**Function************************************************************* + + Synopsis [Returns the positions where pInfo2 is 1 while pInfo1 is 0.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Sim_UtilInfoDetectDiffs( unsigned * pInfo1, unsigned * pInfo2, int nWords, Vec_Int_t * vDiffs ) +{ + int w, b; + unsigned uMask; + vDiffs->nSize = 0; + for ( w = 0; w < nWords; w++ ) + if ( uMask = (pInfo2[w] ^ pInfo1[w]) ) + for ( b = 0; b < 32; b++ ) + if ( uMask & (1 << b) ) + Vec_IntPush( vDiffs, 32*w + b ); +} + +/**Function************************************************************* + + Synopsis [Returns the positions where pInfo2 is 1 while pInfo1 is 0.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Sim_UtilInfoDetectNews( unsigned * pInfo1, unsigned * pInfo2, int nWords, Vec_Int_t * vDiffs ) +{ + int w, b; + unsigned uMask; + vDiffs->nSize = 0; + for ( w = 0; w < nWords; w++ ) + if ( uMask = (pInfo2[w] & ~pInfo1[w]) ) + for ( b = 0; b < 32; b++ ) + if ( uMask & (1 << b) ) + Vec_IntPush( vDiffs, 32*w + b ); +} + +/**Function************************************************************* + + Synopsis [Computes structural supports.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Sim_UtilComputeStrSupp( Sim_Man_t * p ) +{ + Abc_Obj_t * pNode; + unsigned * pSimmNode, * pSimmNode1, * pSimmNode2; + int i, k; + // assign the structural support to the PIs + Abc_NtkForEachCi( p->pNtk, pNode, i ) + Sim_SuppStrSetVar( p, pNode, i ); + // derive the structural supports of the internal nodes + Abc_NtkForEachNode( p->pNtk, pNode, i ) + { + if ( Abc_NodeIsConst(pNode) ) + continue; + pSimmNode = p->vSuppStr->pArray[ pNode->Id ]; + pSimmNode1 = p->vSuppStr->pArray[ Abc_ObjFaninId0(pNode) ]; + pSimmNode2 = p->vSuppStr->pArray[ Abc_ObjFaninId1(pNode) ]; + for ( k = 0; k < p->nSuppWords; k++ ) + pSimmNode[k] = pSimmNode1[k] | pSimmNode2[k]; + } + // set the structural supports of the PO nodes + Abc_NtkForEachCo( p->pNtk, pNode, i ) + { + pSimmNode = p->vSuppStr->pArray[ pNode->Id ]; + pSimmNode1 = p->vSuppStr->pArray[ Abc_ObjFaninId0(pNode) ]; + for ( k = 0; k < p->nSuppWords; k++ ) + pSimmNode[k] = pSimmNode1[k]; + } +} + +/**Function************************************************************* + + Synopsis [Assigns random simulation info to the PIs.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Sim_UtilAssignRandom( Sim_Man_t * p ) +{ + Abc_Obj_t * pNode; + unsigned * pSimInfo; + int i, k; + // assign the random/systematic simulation info to the PIs + Abc_NtkForEachCi( p->pNtk, pNode, i ) + { + pSimInfo = p->vSim0->pArray[pNode->Id]; + for ( k = 0; k < p->nSimWords; k++ ) + pSimInfo[k] = SIM_RANDOM_UNSIGNED; + } +} + +/**Function************************************************************* + + Synopsis [Flips the simulation info of the node.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Sim_UtilFlipSimInfo( Sim_Man_t * p, Abc_Obj_t * pNode ) +{ + unsigned * pSimInfo1, * pSimInfo2; + int k; + pSimInfo1 = p->vSim1->pArray[pNode->Id]; + pSimInfo2 = p->vSim0->pArray[pNode->Id]; + for ( k = 0; k < p->nSimWords; k++ ) + pSimInfo2[k] = ~pSimInfo1[k]; +} + +/**Function************************************************************* + + Synopsis [Returns 1 if the simulation infos are equal.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +bool Sim_UtilCompareSimInfo( Sim_Man_t * p, Abc_Obj_t * pNode ) +{ + unsigned * pSimInfo1, * pSimInfo2; + int k; + pSimInfo1 = p->vSim1->pArray[pNode->Id]; + pSimInfo2 = p->vSim0->pArray[pNode->Id]; + for ( k = 0; k < p->nSimWords; k++ ) + if ( pSimInfo2[k] != pSimInfo1[k] ) + return 0; + return 1; +} + +/**Function************************************************************* + + Synopsis [Simulates the internal nodes.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Sim_UtilSimulate( Sim_Man_t * p, bool fType ) +{ + Abc_Obj_t * pNode; + int i; + // simulate the internal nodes + Abc_NtkForEachNode( p->pNtk, pNode, i ) + Sim_UtilSimulateNode( p, pNode, fType, fType, fType ); + // assign simulation info of the CO nodes + Abc_NtkForEachCo( p->pNtk, pNode, i ) + Sim_UtilSimulateNode( p, pNode, fType, fType, fType ); +} + +/**Function************************************************************* + + Synopsis [Simulates one node.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Sim_UtilSimulateNode( Sim_Man_t * p, Abc_Obj_t * pNode, bool fType, bool fType1, bool fType2 ) +{ + unsigned * pSimmNode, * pSimmNode1, * pSimmNode2; + int k, fComp1, fComp2; + // simulate the internal nodes + if ( Abc_ObjIsNode(pNode) ) + { + if ( Abc_NodeIsConst(pNode) ) + return; + + if ( fType ) + pSimmNode = p->vSim1->pArray[ pNode->Id ]; + else + pSimmNode = p->vSim0->pArray[ pNode->Id ]; + + if ( fType1 ) + pSimmNode1 = p->vSim1->pArray[ Abc_ObjFaninId0(pNode) ]; + else + pSimmNode1 = p->vSim0->pArray[ Abc_ObjFaninId0(pNode) ]; + + if ( fType2 ) + pSimmNode2 = p->vSim1->pArray[ Abc_ObjFaninId1(pNode) ]; + else + pSimmNode2 = p->vSim0->pArray[ Abc_ObjFaninId1(pNode) ]; + + fComp1 = Abc_ObjFaninC0(pNode); + fComp2 = Abc_ObjFaninC1(pNode); + if ( fComp1 && fComp2 ) + for ( k = 0; k < p->nSimWords; k++ ) + pSimmNode[k] = ~pSimmNode1[k] & ~pSimmNode2[k]; + else if ( fComp1 && !fComp2 ) + for ( k = 0; k < p->nSimWords; k++ ) + pSimmNode[k] = ~pSimmNode1[k] & pSimmNode2[k]; + else if ( !fComp1 && fComp2 ) + for ( k = 0; k < p->nSimWords; k++ ) + pSimmNode[k] = pSimmNode1[k] & ~pSimmNode2[k]; + else // if ( fComp1 && fComp2 ) + for ( k = 0; k < p->nSimWords; k++ ) + pSimmNode[k] = pSimmNode1[k] & pSimmNode2[k]; + } + else + { + assert( Abc_ObjFaninNum(pNode) == 1 ); + if ( fType ) + pSimmNode = p->vSim1->pArray[ pNode->Id ]; + else + pSimmNode = p->vSim0->pArray[ pNode->Id ]; + + if ( fType1 ) + pSimmNode1 = p->vSim1->pArray[ Abc_ObjFaninId0(pNode) ]; + else + pSimmNode1 = p->vSim0->pArray[ Abc_ObjFaninId0(pNode) ]; + + fComp1 = Abc_ObjFaninC0(pNode); + if ( fComp1 ) + for ( k = 0; k < p->nSimWords; k++ ) + pSimmNode[k] = ~pSimmNode1[k]; + else + for ( k = 0; k < p->nSimWords; k++ ) + pSimmNode[k] = pSimmNode1[k]; + } +} + +/**Function************************************************************* + + Synopsis [Returns 1 if the simulation infos are equal.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +int Sim_UtilCountSuppSizes( Sim_Man_t * p, int fStruct ) +{ + Abc_Obj_t * pNode, * pNodeCi; + int i, v, Counter; + Counter = 0; + if ( fStruct ) + { + Abc_NtkForEachCo( p->pNtk, pNode, i ) + Abc_NtkForEachCi( p->pNtk, pNodeCi, v ) + Counter += Sim_SuppStrHasVar( p, pNode, v ); + } + else + { + Abc_NtkForEachCo( p->pNtk, pNode, i ) + Abc_NtkForEachCi( p->pNtk, pNodeCi, v ) + Counter += Sim_SuppFunHasVar( p, i, v ); + } + return Counter; +} + +//////////////////////////////////////////////////////////////////////// +/// END OF FILE /// +//////////////////////////////////////////////////////////////////////// + + -- cgit v1.2.3