From 21c7dad7e440492e4533b4dc228c54907819de39 Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Thu, 24 May 2018 19:36:28 +0900 Subject: Supporting NMUX and SEL in NDR. --- src/aig/miniaig/ndr.h | 55 ++++++++++++++++++++++++++++++++++++++++++++++ src/base/wlc/wlc.h | 1 + src/base/wlc/wlcCom.c | 2 +- src/base/wlc/wlcNdr.c | 2 ++ src/base/wlc/wlcWriteVer.c | 30 ++++++++++++++++++++++++- 5 files changed, 88 insertions(+), 2 deletions(-) diff --git a/src/aig/miniaig/ndr.h b/src/aig/miniaig/ndr.h index 32f5e618..a1f657ba 100644 --- a/src/aig/miniaig/ndr.h +++ b/src/aig/miniaig/ndr.h @@ -951,6 +951,61 @@ static inline void Ndr_ModuleTestFlop() Ndr_Delete( pDesign ); } + +// This testing procedure creates and writes into a Verilog file +// the following design composed of one selector + +// module sel ( input [3:0] c, input [2:0] d0, input [2:0] d1, input [2:0] d2, input [2:0] d3, input [2:0] out ); +// wire [2:0] s7 ; +// always @( c or d0 or d1 or d2 or d3 ) +// begin +// case ( c ) +// 4'b0001 : s7 = d0 ; +// 4'b0010 : s7 = d1 ; +// 4'b0100 : s7 = d2 ; +// 4'b1000 : s7 = d3 ; +// endcase +// end +// assign out = s7 ; +// endmodule + +static inline void Ndr_ModuleTestSelSel() +{ + // map name IDs into char strings + char * ppNames[12] = { NULL, "sel", "c", "d0", "d1", "d2", "d3", "out" }; + // name IDs + int NameIdC = 2; + int NameIdD0 = 3; + int NameIdD1 = 4; + int NameIdD2 = 5; + int NameIdD3 = 6; + int NameIdOut = 7; + // array of fanins of node s + int Fanins[8] = { NameIdC, NameIdD0, NameIdD1, NameIdD2, NameIdD3 }; + + // create a new module + void * pDesign = Ndr_Create( 1 ); + + int ModuleID = Ndr_AddModule( pDesign, 1 ); + + // add objects to the modele + Ndr_AddObject( pDesign, ModuleID, ABC_OPER_CI, 0, 3, 0, 0, 0, NULL, 1, &NameIdC, NULL ); + Ndr_AddObject( pDesign, ModuleID, ABC_OPER_CI, 0, 2, 0, 0, 0, NULL, 1, &NameIdD0, NULL ); + Ndr_AddObject( pDesign, ModuleID, ABC_OPER_CI, 0, 2, 0, 0, 0, NULL, 1, &NameIdD1, NULL ); + Ndr_AddObject( pDesign, ModuleID, ABC_OPER_CI, 0, 2, 0, 0, 0, NULL, 1, &NameIdD2, NULL ); + Ndr_AddObject( pDesign, ModuleID, ABC_OPER_CI, 0, 2, 0, 0, 0, NULL, 1, &NameIdD3, NULL ); + + Ndr_AddObject( pDesign, ModuleID, ABC_OPER_SEL_SEL, 0, 2, 0, 0, 5, Fanins, 1, &NameIdOut, NULL ); + + Ndr_AddObject( pDesign, ModuleID, ABC_OPER_CO, 0, 2, 0, 0, 1, &NameIdOut,0, NULL, NULL ); + + // write Verilog for verification + //Ndr_WriteVerilog( NULL, pDesign, ppNames ); + Ndr_Write( "sel.ndr", pDesign ); + Ndr_Delete( pDesign ); +} + + ABC_NAMESPACE_HEADER_END #endif diff --git a/src/base/wlc/wlc.h b/src/base/wlc/wlc.h index 982a9d28..02921722 100644 --- a/src/base/wlc/wlc.h +++ b/src/base/wlc/wlc.h @@ -99,6 +99,7 @@ typedef enum { WLC_OBJ_READ, // 54: read port WLC_OBJ_WRITE, // 55: write port WLC_OBJ_ARI_ADDSUB, // 56: adder-subtractor + WLC_OBJ_SEL, // 57: positionally encoded selector WLC_OBJ_NUMBER // 57: unused } Wlc_ObjType_t; // when adding new types, remember to update table Wlc_Names in "wlcNtk.c" diff --git a/src/base/wlc/wlcCom.c b/src/base/wlc/wlcCom.c index 9322a3c2..711763c7 100644 --- a/src/base/wlc/wlcCom.c +++ b/src/base/wlc/wlcCom.c @@ -1672,7 +1672,7 @@ int Abc_CommandTest( Abc_Frame_t * pAbc, int argc, char ** argv ) //Wlc_NtkSimulateTest( (Wlc_Ntk_t *)pAbc->pAbcWlc ); //pNtk = Wlc_NtkDupSingleNodes( pNtk ); //Wlc_AbcUpdateNtk( pAbc, pNtk ); - Ndr_ModuleTestMemory(); + Ndr_ModuleTestSelSel(); //pNtk = Wlc_NtkMemAbstractTest( pNtk ); //Wlc_AbcUpdateNtk( pAbc, pNtk ); return 0; diff --git a/src/base/wlc/wlcNdr.c b/src/base/wlc/wlcNdr.c index 8e89ae2c..3e6600c3 100644 --- a/src/base/wlc/wlcNdr.c +++ b/src/base/wlc/wlcNdr.c @@ -70,6 +70,7 @@ int Ndr_TypeNdr2Wlc( int Type ) if ( Type == ABC_OPER_LOGIC_OR ) return WLC_OBJ_LOGIC_OR; // 29: logic OR if ( Type == ABC_OPER_LOGIC_XOR ) return WLC_OBJ_LOGIC_XOR; // 30: logic XOR if ( Type == ABC_OPER_SEL_NMUX ) return WLC_OBJ_MUX; // 08: multiplexer + if ( Type == ABC_OPER_SEL_SEL ) return WLC_OBJ_SEL; // 57: selector if ( Type == ABC_OPER_COMP_EQU ) return WLC_OBJ_COMP_EQU; // 31: compare equal if ( Type == ABC_OPER_COMP_NOTEQU ) return WLC_OBJ_COMP_NOTEQU; // 32: compare not equal if ( Type == ABC_OPER_COMP_LESS ) return WLC_OBJ_COMP_LESS; // 33: compare less @@ -127,6 +128,7 @@ int Ndr_TypeWlc2Ndr( int Type ) if ( Type == WLC_OBJ_LOGIC_AND ) return ABC_OPER_LOGIC_AND; // 28: logic AND if ( Type == WLC_OBJ_LOGIC_OR ) return ABC_OPER_LOGIC_OR; // 29: logic OR if ( Type == WLC_OBJ_LOGIC_XOR ) return ABC_OPER_LOGIC_XOR; // 30: logic XOR + if ( Type == WLC_OBJ_SEL ) return ABC_OPER_SEL_SEL; // 57: selector if ( Type == WLC_OBJ_COMP_EQU ) return ABC_OPER_COMP_EQU; // 31: compare equal if ( Type == WLC_OBJ_COMP_NOTEQU ) return ABC_OPER_COMP_NOTEQU; // 32: compare not equal if ( Type == WLC_OBJ_COMP_LESS ) return ABC_OPER_COMP_LESS; // 33: compare less diff --git a/src/base/wlc/wlcWriteVer.c b/src/base/wlc/wlcWriteVer.c index cc33b483..dbf24e68 100644 --- a/src/base/wlc/wlcWriteVer.c +++ b/src/base/wlc/wlcWriteVer.c @@ -147,7 +147,7 @@ void Wlc_WriteVerIntVec( FILE * pFile, Wlc_Ntk_t * p, Vec_Int_t * vVec, int Star void Wlc_WriteVerInt( FILE * pFile, Wlc_Ntk_t * p, int fNoFlops ) { Wlc_Obj_t * pObj; - int i, k, iFanin; + int i, k, j, iFanin; char Range[100]; fprintf( pFile, "module %s ( ", p->pName ); fprintf( pFile, "\n " ); @@ -253,6 +253,34 @@ void Wlc_WriteVerInt( FILE * pFile, Wlc_Ntk_t * p, int fNoFlops ) fprintf( pFile, "end\n" ); continue; } + else if ( pObj->Type == WLC_OBJ_SEL ) + { + fprintf( pFile, "%s ;\n", Wlc_ObjName(p, i) ); + fprintf( pFile, " " ); + fprintf( pFile, "always @( " ); + Wlc_ObjForEachFanin( pObj, iFanin, k ) + fprintf( pFile, "%s%s", k ? " or ":"", Wlc_ObjName(p, Wlc_ObjFaninId(pObj, k)) ); + fprintf( pFile, " )\n" ); + fprintf( pFile, " " ); + fprintf( pFile, "begin\n" ); + fprintf( pFile, " " ); + fprintf( pFile, "case ( %s )\n", Wlc_ObjName(p, Wlc_ObjFaninId(pObj, 0)) ); + Wlc_ObjForEachFanin( pObj, iFanin, k ) + { + if ( !k ) continue; + fprintf( pFile, " " ); + fprintf( pFile, "%d\'b", Wlc_ObjFaninNum(pObj)-1 ); + for ( j = Wlc_ObjFaninNum(pObj)-1; j > 0; j-- ) + fprintf( pFile, "%d", (int)(j==k) ); + fprintf( pFile, " : %s = ", Wlc_ObjName(p, i) ); + fprintf( pFile, "%s ;\n", Wlc_ObjName(p, Wlc_ObjFaninId(pObj, k)) ); + } + fprintf( pFile, " " ); + fprintf( pFile, "endcase\n" ); + fprintf( pFile, " " ); + fprintf( pFile, "end\n" ); + continue; + } else if ( pObj->Type == WLC_OBJ_READ || pObj->Type == WLC_OBJ_WRITE ) { if ( p->fMemPorts ) -- cgit v1.2.3