From 1b0439d128be83914825ed097f4b42201d531213 Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Thu, 11 Aug 2022 20:19:37 -0700 Subject: Changing 2:1 MUX fanin order to be (ctrl, data0, data1). --- src/aig/miniaig/ndr.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/aig/miniaig/ndr.h b/src/aig/miniaig/ndr.h index 68c2779c..19373063 100644 --- a/src/aig/miniaig/ndr.h +++ b/src/aig/miniaig/ndr.h @@ -506,7 +506,7 @@ static inline void Ndr_WriteVerilogModule( FILE * pFile, void * pDesign, int Mod else if ( nArray == 3 && Type == ABC_OPER_ARI_ADD ) fprintf( pFile, "%s + %s + %s;\n", pNames[pArray[0]], pNames[pArray[1]], pNames[pArray[2]] ); else if ( Type == ABC_OPER_BIT_MUX ) - fprintf( pFile, "%s ? %s : %s;\n", pNames[pArray[0]], pNames[pArray[1]], pNames[pArray[2]] ); + fprintf( pFile, "%s ? %s : %s;\n", pNames[pArray[0]], pNames[pArray[2]], pNames[pArray[1]] ); else fprintf( pFile, ";\n", Abc_OperName(Ndr_ObjReadBody(p, Obj, NDR_OPERTYPE)) ); } -- cgit v1.2.3