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* Simple BDD package.Alan Mishchenko2018-05-231-0/+395
* Simple BDD package.Alan Mishchenko2018-05-232-1/+4
* Fix to prevent undefined behavior.Alan Mishchenko2018-05-191-2/+2
* Bug fix in supporting signed multiplication in NDR.Alan Mishchenko2018-05-181-6/+7
* Supporting wide MUX in NDR.Alan Mishchenko2018-05-161-2/+7
* Bug fix in the naming of outputs in %blast -d.Alan Mishchenko2018-05-101-3/+21
* Bug fix in &sat -x.Alan Mishchenko2018-05-072-2/+5
* Adding &sat -x to save CEXes for multi-output combinational miters.Alan Mishchenko2018-05-064-4/+56
* Updates to NDR format (bug fixes).Alan Mishchenko2018-05-034-32/+39
* Updates to NDR format (flops, memories, signed mult, etc).Alan Mishchenko2018-04-2910-100/+596
* The ECO code (fix to the broken build).Alan Mishchenko2018-04-281-2/+2
* Adding switch &w -p to dump AIG in a Verilog file.Alan Mishchenko2018-04-253-2/+195
* The ECO code.Alan Mishchenko2018-04-251-2/+11
* The ECO code.Alan Mishchenko2018-04-252-8/+2500
* Typo in the command description.Alan Mishchenko2018-04-251-5/+5
* Memory abstraction.Alan Mishchenko2018-04-204-10/+20
* Memory abstraction.Alan Mishchenko2018-04-194-154/+284
* Memory abstraction.Alan Mishchenko2018-04-158-84/+1086
* Adding adder-subtractor primitive.Alan Mishchenko2018-04-111-1/+3
* Making sure duplicated inverters are not created.Alan Mishchenko2018-04-111-3/+9
* Travis: build with namespaces enabled, andBaruch Sterin2018-04-021-5/+22
* Rename new flag to ABC_USE_STDINT_HRobert Ou2018-03-292-7/+7
* Add an option to use C99 stdint.hRobert Ou2018-03-262-0/+56
* Integrating SAT-based CEX minimization (bug fix).Alan Mishchenko2018-03-253-11/+11
* Integrating SAT-based CEX minimization.Alan Mishchenko2018-03-254-10/+145
* Adding new NPN code (compiler fix).Alan Mishchenko2018-03-251-9/+9
* Adding new NPN code (compiler fix).Alan Mishchenko2018-03-251-1/+1
* Adding new NPN code developed by XueGong Zhou at Fudan University.Alan Mishchenko2018-03-254-144/+1098
* Updating &mfs to support hard objects.Alan Mishchenko2018-03-232-2/+55
* Adding switch 'scorr -f' to dump inductive invariant as an AIG.Alan Mishchenko2018-03-226-16/+36
* Temporary bug fix for signal names in WLC (correction).Alan Mishchenko2018-03-211-2/+5
* Temporary bug fix for signal names in WLC.Alan Mishchenko2018-03-211-0/+2
* Bug fix in blasting with boxes.Alan Mishchenko2018-03-061-1/+1
* Extending primitives supported by WLC.Alan Mishchenko2018-03-033-5/+85
* Adding parameters and improvements to %blast.Alan Mishchenko2018-02-286-1/+20
* Adding parameters and improvements to %blast.Alan Mishchenko2018-02-2812-101/+307
* Adding support for adders with carry-in in WLC and NDR.Alan Mishchenko2018-02-245-5/+113
* Bug fix in NDR handling.Alan Mishchenko2018-02-201-6/+38
* Merge two branches.Alan Mishchenko2018-02-201-33/+81
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| * Improvements to circuit based solver.Alan Mishchenko2018-02-201-33/+81
* | Small fix in satoko.Bruno Schmitt2018-02-202-3/+1
|/
* Compilation problem with pow().Alan Mishchenko2018-02-194-7/+7
* Improvements to circuit based solver.Alan Mishchenko2018-02-171-193/+490
* Extending MiniLUT to return attributes.Alan Mishchenko2018-02-112-0/+20
* Experiments with LUT mapping.Alan Mishchenko2018-02-103-14/+65
* Fixing input swapping issue in MUXes derived from NDR.Alan Mishchenko2018-02-072-0/+4
* Improvements to NDR to represent hierarchical designs.Alan Mishchenko2018-02-051-2/+2
* Improvements to NDR to represent hierarchical designs.Alan Mishchenko2018-02-052-3/+2
* Improvements to NDR to represent hierarchical designs.Alan Mishchenko2018-02-054-66/+219
* Suggested fix to compile on FreeBSD.Alan Mishchenko2018-02-041-1/+3
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