| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Adding solver type in &sat. | Alan Mishchenko | 2020-12-16 | 1 | -1/+5 |
| * | Adding switch to replace proved outputs by const0. | Alan Mishchenko | 2020-12-16 | 1 | -1/+1 |
| * | Experiments with SAT sweeping. | Alan Mishchenko | 2020-11-09 | 1 | -0/+3 |
| * | Adding new command 'dump_equiv'. | Alan Mishchenko | 2016-07-21 | 1 | -1/+1 |
| * | Enabling circuit solver in &fraig. | Alan Mishchenko | 2014-08-12 | 1 | -0/+2 |
| * | Adding a wrapper around clock() for more accurate time counting in ABC. | Alan Mishchenko | 2013-05-27 | 1 | -12/+12 |
| * | Updating project settings to have simpler include paths. | Alan Mishchenko | 2012-07-07 | 1 | -3/+3 |
| * | Fixing time primtouts throughout the code. | Alan Mishchenko | 2012-07-07 | 1 | -12/+12 |
| * | Major restructuring of the code. | Alan Mishchenko | 2012-01-21 | 1 | -0/+225 |
 |
index : iCE40/abc | |
| clone of https://github.com/YosysHQ/abc |
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