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yosys-experimental
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Author
Age
Files
Lines
...
*
Improved DSD.
Alan Mishchenko
2012-11-11
4
-8
/
+122
*
Improved DSD.
Alan Mishchenko
2012-11-11
3
-106
/
+542
*
Improved DSD.
Alan Mishchenko
2012-11-10
2
-6
/
+7
*
Improved DSD.
Alan Mishchenko
2012-11-10
3
-54
/
+169
*
Improved DSD.
Alan Mishchenko
2012-11-10
4
-143
/
+1030
*
Improved DSD.
Alan Mishchenko
2012-11-06
1
-68
/
+80
*
Improved DSD.
Alan Mishchenko
2012-11-06
1
-2
/
+2
*
Improved DSD.
Alan Mishchenko
2012-11-06
2
-358
/
+304
*
Improved DSD.
Alan Mishchenko
2012-11-06
1
-43
/
+201
*
Improved DSD.
Alan Mishchenko
2012-11-03
2
-218
/
+384
*
Improved DSD.
Alan Mishchenko
2012-11-03
1
-54
/
+148
*
Improved DSD.
Alan Mishchenko
2012-11-02
1
-20
/
+217
*
Fixing out-of-bound problem when collecting GIA nodes.
Alan Mishchenko
2012-11-02
1
-27
/
+134
*
Improvements to the truth table computations.
Alan Mishchenko
2012-11-01
2
-26
/
+19
*
Improvements to the truth table computations.
Alan Mishchenko
2012-11-01
2
-635
/
+804
*
Improvements to the truth table computations.
Alan Mishchenko
2012-11-01
1
-40
/
+348
*
Improvements to the truth table computations.
Alan Mishchenko
2012-10-31
1
-88
/
+0
*
Improvements to the truth table computations.
Alan Mishchenko
2012-10-31
1
-0
/
+87
*
Improvements to the truth table computations.
Alan Mishchenko
2012-10-30
1
-3
/
+3
*
Improvements to the truth table computations.
Alan Mishchenko
2012-10-30
2
-0
/
+537
*
Improvements to the truth table computations.
Alan Mishchenko
2012-10-30
1
-162
/
+85
*
Improvements to the truth table computation in 'if' package.
Alan Mishchenko
2012-10-29
1
-0
/
+339
*
Tentatively integrated new DSD.
Alan Mishchenko
2012-10-29
1
-1
/
+1
*
Enumerating decompositions.
Alan Mishchenko
2012-10-29
2
-1
/
+255
*
Integrating GIA with LUT mapping.
Alan Mishchenko
2012-10-24
1
-1
/
+0
*
Making explicit cast to 64-bit unsigned in a few places.
Alan Mishchenko
2012-10-09
1
-5
/
+5
*
New AIG optimization package.
Alan Mishchenko
2012-10-06
1
-5
/
+5
*
New AIG optimization package.
Alan Mishchenko
2012-10-06
1
-31
/
+18
*
New AIG optimization package.
Alan Mishchenko
2012-10-06
1
-19
/
+59
*
New AIG optimization package.
Alan Mishchenko
2012-10-06
2
-3
/
+3
*
New AIG optimization package.
Alan Mishchenko
2012-10-06
5
-0
/
+683
*
Bug fix in XOR balancing (command 'balance -x').
Alan Mishchenko
2012-10-05
1
-1
/
+1
*
Renamed reference counting APIs in GIA package.
Alan Mishchenko
2012-10-02
1
-4
/
+4
*
Replacing 'st_table' by 'st__table' to resolve linker problems.
Alan Mishchenko
2012-09-29
4
-24
/
+24
*
Cleaing AIG manager by removing pointers to HAIG.
Alan Mishchenko
2012-09-23
2
-58
/
+0
*
Upgrading hierarchy timing manager.
Alan Mishchenko
2012-09-21
2
-2
/
+2
*
Created new abstraction package from the code that was all over the place.
Alan Mishchenko
2012-09-15
1
-1
/
+1
*
Enabled recording the name of the file GIA is coming from.
Alan Mishchenko
2012-09-04
1
-0
/
+1
*
Added an API to convert a multi-output PLA into a shared AIG.
Alan Mishchenko
2012-08-29
1
-1
/
+3
*
Added simulation of comb circuits with user-specified patterns in command 'sim'.
Alan Mishchenko
2012-08-24
1
-1
/
+1
*
Replacing Mb/Gb to be MB/GB.
Alan Mishchenko
2012-07-09
6
-10
/
+10
*
Updating project settings to have simpler include paths.
Alan Mishchenko
2012-07-07
51
-88
/
+88
*
Fixing time primtouts throughout the code.
Alan Mishchenko
2012-07-07
1
-1
/
+1
*
Fixing time primtouts throughout the code.
Alan Mishchenko
2012-07-07
12
-21
/
+31
*
Fixing time primtouts throughout the code.
Alan Mishchenko
2012-07-07
51
-177
/
+211
*
Bug fix in &gla_refine.
Alan Mishchenko
2012-07-07
1
-0
/
+3
*
Various changes to enable sensitization-based refinement in &gla.
Alan Mishchenko
2012-07-04
4
-10
/
+10
*
Performance improvement in &gla_refine.
Alan Mishchenko
2012-07-03
1
-1
/
+1
*
Other improvements to bmc2 and bmc3.
Alan Mishchenko
2012-07-01
1
-0
/
+85
*
Bug fix in &gla_refine.
Alan Mishchenko
2012-06-29
1
-8
/
+4
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