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yosys-experimental
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dar
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Author
Age
Files
Lines
*
Bug fix in XOR balancing (command 'balance -x').
Alan Mishchenko
2012-10-05
1
-1
/
+1
*
Cleaing AIG manager by removing pointers to HAIG.
Alan Mishchenko
2012-09-23
2
-58
/
+0
*
Replacing Mb/Gb to be MB/GB.
Alan Mishchenko
2012-07-09
2
-2
/
+2
*
Updating project settings to have simpler include paths.
Alan Mishchenko
2012-07-07
7
-12
/
+12
*
Fixing time primtouts throughout the code.
Alan Mishchenko
2012-07-07
2
-3
/
+4
*
Fixing time primtouts throughout the code.
Alan Mishchenko
2012-07-07
5
-22
/
+25
*
Various changes to enable sensitization-based refinement in &gla.
Alan Mishchenko
2012-07-04
4
-10
/
+10
*
Other improvements to bmc2 and bmc3.
Alan Mishchenko
2012-07-01
1
-0
/
+85
*
Important bug fix in XOR balancing (balance -x).
Alan Mishchenko
2012-03-26
1
-185
/
+91
*
Logic sharing for multi-input gates.
Alan Mishchenko
2012-03-26
1
-7
/
+194
*
Renamed Aig_ObjPioNum to be Aig_ObjCioId.
Alan Mishchenko
2012-03-09
1
-4
/
+4
*
Renamed Aig_ObjIsPi/Po to be ...Ci/Co and Aig_Man(Pi/Po)Num to be ...(Ci/Co)...
Alan Mishchenko
2012-03-09
3
-4
/
+4
*
Renamed Aig_ManForEachPi/Po to be ...Ci/Co and Aig_ObjCreatePi/Po to be ...Ci...
Alan Mishchenko
2012-03-09
2
-7
/
+7
*
Silencing some of the gcc warnings.
Alan Mishchenko
2012-02-16
3
-3
/
+3
*
Major restructuring of the code.
Alan Mishchenko
2012-01-21
14
-0
/
+16908