iCE40/abc - clone of https://github.com/YosysHQ/abc

	Commit message (Expand)	Author	Age	Files	Lines
*	Dumping equivalences after SAT sweeping.	Alan Mishchenko	2022-06-26	1	-0/+8
*	Various changes.	Alan Mishchenko	2021-10-22	1	-0/+4
*	Various changes.	Alan Mishchenko	2021-09-30	1	-0/+8
*	Experiments with LUT mapping for small functions.	Alan Mishchenko	2021-07-13	1	-0/+26
*	Updating LUT synthesis code.	Alan Mishchenko	2021-05-11	1	-11/+14
*	Updating LUT synthesis code.	Alan Mishchenko	2021-05-08	1	-0/+57
*	Extending &sim_read to use non-64-divisible pattern counts.	Alan Mishchenko	2020-08-12	1	-3/+13
*	Experimental resubstitution.	Alan Mishchenko	2020-05-15	1	-0/+119
*	Updating and extending simulation data structures.	Alan Mishchenko	2020-03-05	1	-0/+7
*	Fixing some more warnings by adding cast from 'int' to 'size_t'.	Alan Mishchenko	2019-03-05	1	-5/+5
*	Fixing some warnings by adding cast from 'int' to 'size_t' in memset, memcpy,...	Alan Mishchenko	2019-03-05	1	-3/+3
*	Scalable SOP manipulation package.	Alan Mishchenko	2015-03-23	1	-0/+19
*	New assertions and bug fix in DSD balancing.	Alan Mishchenko	2015-01-27	1	-0/+10
*	Bug fix in &fraig -L <num>.	Alan Mishchenko	2014-08-12	1	-0/+11
*	Various changes to enable better CNF generation.	Alan Mishchenko	2014-06-17	1	-0/+17
*	Compiler warnings.	Alan Mishchenko	2013-10-30	1	-4/+3
*	Changes to enable decomposition of non-DSD functions.	Alan Mishchenko	2013-09-25	1	-0/+18
*	Minor bug fixes.	Alan Mishchenko	2012-10-03	1	-3/+3
*	Added printout of library cells.	Alan Mishchenko	2012-08-27	1	-0/+22
*	Adding memory reporting to vectors.	Alan Mishchenko	2012-07-29	1	-0/+16
*	Added memory reporting to &vta.	Alan Mishchenko	2012-06-22	1	-0/+16
*	Misc changes.	Alan Mishchenko	2012-05-03	1	-0/+6
*	Silenced a gcc warning.	Alan Mishchenko	2012-02-24	1	-1/+1
*	Major restructuring of the code.	Alan Mishchenko	2012-01-21	1	-2/+2
*	initial commit of public abc	Alan Mishchenko	2010-11-01	1	-0/+1071