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* Updating Mio to use int instead of float.Alan Mishchenko2015-08-312-2/+192
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* Alternative way to bit-blast a divisor.Alan Mishchenko2015-08-291-1/+1
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* Important bug fixes in standard-cell library handling and mapper &nf.Alan Mishchenko2015-08-284-14/+34
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* Changes to be able to compile ABC without CUDD.Alan Mishchenko2015-08-242-1/+3
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* New switch in 'read_lib' to replace gate/pin names by short strings.Alan Mishchenko2015-08-241-5/+44
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* New switch in 'read_lib' to replace gate/pin names by short strings.Alan Mishchenko2015-08-243-2/+105
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* Experiments with mapping plus small changes.Alan Mishchenko2015-08-233-3/+10
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* Small changes to enable collecting results using &ps -D file.Alan Mishchenko2015-07-092-0/+2
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* Bug fix in programmable cell parser and minor tuning.Alan Mishchenko2015-07-081-1/+2
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* C++ compiler typecast problem.Alan Mishchenko2015-07-081-1/+1
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* Add fix to Liberty parser to skip extra semicolon.Alan Mishchenko2015-07-061-0/+5
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* Undo recent assert.Alan Mishchenko2015-06-271-2/+2
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* Potential performance bug in the mapper.Alan Mishchenko2015-06-271-1/+1
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* Supporting AND-gate cuts in 'if' and '&if'Alan Mishchenko2015-06-213-6/+27
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* Bug fix in 'dsd_tune' when processing cells with 0-input LUTs.Alan Mishchenko2015-05-151-2/+7
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* Making sure 0-input LUTs are supported by the DSD matching code.Alan Mishchenko2015-05-141-5/+5
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* Improving the criteria to select representative gates in 'map' with ↵Alan Mishchenko2015-04-251-47/+60
| | | | floating-point-delay libraries having more than one gate in some functionality classes.
* Adding switch 'map -f' to not use large gates for high-fanout nodes ↵Alan Mishchenko2015-04-244-2/+5
| | | | (disabled by default).
* Adding platform-independent (alphabetic) way of sorting Genlib gates and ↵Alan Mishchenko2015-04-172-20/+56
| | | | selecting representatives based on area/delay.
* Adding APIs to retrieve NOR/OR gates from the library.Alan Mishchenko2015-04-144-4/+15
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* Getting default AND-node delay from Genlib library.Alan Mishchenko2015-04-062-0/+2
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* Support for representing programmable cell configuration data (bug fix).Alan Mishchenko2015-03-091-1/+4
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* Support for representing programmable cell configuration data.Alan Mishchenko2015-03-081-1/+2
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* Support for representing programmable cell configuration data.Alan Mishchenko2015-03-083-64/+222
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* Experiments with SAT-based cube enumeration.Alan Mishchenko2015-03-051-3/+4
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* Corner case bug in wire-cap estimation.Alan Mishchenko2015-02-181-0/+2
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* Several improvements to CBA data-structure.Alan Mishchenko2015-02-091-1/+1
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* Fixed a typo in variable names.Alan Mishchenko2015-02-075-24/+24
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* Improvements and tuning of CBA with buffering/sizing.Alan Mishchenko2015-02-045-28/+77
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* Improvements and tuning of CBA.Alan Mishchenko2015-02-011-0/+2
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* Major rehash of the CBA code.Alan Mishchenko2015-01-312-0/+21
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* New assertions and bug fix in DSD balancing.Alan Mishchenko2015-01-272-8/+11
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* Gate sizing with barrier buffers.Alan Mishchenko2014-12-213-1/+52
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* Exprimental features in tech-mapping.Alan Mishchenko2014-12-211-2/+3
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* Bug fix in reading box library.Alan Mishchenko2014-12-201-1/+1
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* Integrating barrier buffers.Alan Mishchenko2014-12-135-10/+76
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* Adding new mapping feature.Alan Mishchenko2014-12-114-18/+56
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* Integrating barrier buffers.Alan Mishchenko2014-12-081-0/+8
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* Bug fix in truth table computation.Alan Mishchenko2014-10-151-11/+9
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* Recommended changes for portability.Alan Mishchenko2014-10-121-1/+1
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* MUX decomposition during mapping.Alan Mishchenko2014-10-111-1/+0
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* Deriving network in terms of programmable cells.Alan Mishchenko2014-10-111-1/+2
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* Suggested patch for type-punned warningsAlan Mishchenko2014-10-101-3/+6
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* Small changes.Alan Mishchenko2014-10-081-0/+2
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* Compiler warnings.Alan Mishchenko2014-10-082-1/+3
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* Detection of threshold functions.Alan Mishchenko2014-10-082-0/+74
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* Deriving cell mapping with &if -kz.Alan Mishchenko2014-10-041-2/+9
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* Deriving cell mapping with &if -kz.Alan Mishchenko2014-10-043-15/+126
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* Deriving AIG after cell mapping.Alan Mishchenko2014-10-032-0/+11
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* Synchronizing packages.Alan Mishchenko2014-09-201-0/+2
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