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* Merge remote-tracking branch 'upstream/master' into yosys-experimentalMiodrag Milanovic2022-11-091-0/+2
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| * Adding comment about dup cell name.Alan Mishchenko2022-10-111-0/+2
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* | Additional fix for large liberty filesMiodrag Milanovic2022-09-081-26/+26
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* | Support using large liberty filesMiodrag Milanovic2022-09-071-5/+5
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* Fixes internal pin parsing error in ASAP7 liberty file.QuantamHD2021-12-201-1/+5
| | | | | | | This fix addresses an issue I saw with the ASAP7 liberty files and ABC. ASAP7 lists internal pins in its liberty file which ABC's liberty parser doesn't account for. This causes an assert to be triggered. This fix simply adds interal pins to the ignore list.
* Changing declaration of Vec_Ptr_t sorting function to satisfy some compilers.Alan Mishchenko2021-09-262-2/+2
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* Several changes for standard mapping.Alan Mishchenko2021-04-281-2/+13
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* Adding dynamic memory alloc for the buffer in Liberty file reader.Alan Mishchenko2020-01-111-3/+9
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* Small bug in the unused code.Alan Mishchenko2019-10-041-1/+1
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* Fixing some warnings by adding cast from 'int' to 'size_t' in memset, ↵Alan Mishchenko2019-03-051-1/+1
| | | | memcpy, etc.
* Skip cells in Liberty files which have dont_use attribute.Alan Mishchenko2018-10-181-3/+24
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* Compilation problem with pow().Alan Mishchenko2018-02-191-2/+2
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* Value of properties can be expression.Staf Verhaegen2018-01-031-0/+12
| | | | | | | | | | | | | | Example found in the 2007.03 Liberty Reference Manual that was also found in the wild: input_voltage(CMOS) { vil : 0.3 * VDD ; vih : 0.7 * VDD ; vimin : -0.5 ; vimax : VDD + 0.5 ; } Current implementation just parses the expression but no interpretation is done.
* Fix typo on the message reporting max output load.Alan Mishchenko2017-10-111-1/+1
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* stringizing macro argumentHeinz Riener2017-03-031-2/+2
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* Restoring constraint manager to read old constraint file by default (use ↵Alan Mishchenko2017-02-252-18/+26
| | | | 'read_constr -n' to read new format).
* Typo.Alan Mishchenko2017-01-311-1/+1
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* Compiler warnings.Alan Mishchenko2017-01-071-4/+4
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* Compiler warnings.Alan Mishchenko2016-12-311-3/+3
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* Bug fix in Liberty parser.Alan Mishchenko2016-12-051-0/+4
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* Memory leak in scl package.Alan Mishchenko2016-10-121-0/+2
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* Adding API to convert Genlib into a simple Liberty.Alan Mishchenko2016-03-112-0/+143
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* Bug fix in liberty parser and change suggested by Clifford.Alan Mishchenko2016-02-071-0/+2
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* Adding support for delay/area tradeoff.Alan Mishchenko2016-01-131-3/+3
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* Consolidating timing manager Scl_Con_t and propagating changes.Alan Mishchenko2016-01-072-10/+11
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* Bug fix in constraint file reader.Alan Mishchenko2016-01-072-2/+8
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* Migrating to using 32-bit timing representation in &nf.Alan Mishchenko2016-01-051-71/+71
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* Adding code to support gate profiles.Alan Mishchenko2015-12-141-3/+76
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* Improvements to timing optimization.Alan Mishchenko2015-11-114-10/+12
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* Extending and improving timing manager.Alan Mishchenko2015-11-082-12/+35
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* Extending and improving timing manager.Alan Mishchenko2015-11-081-4/+7
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* Extending and improving timing manager.Alan Mishchenko2015-11-082-3/+158
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* silence clang errors when compiling as C++Baruch Sterin2015-11-051-1/+1
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* Changes for delay-oriented computation.Alan Mishchenko2015-10-261-1/+1
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* Improvements to Scl_Lib/SC_Cell data-structure.Alan Mishchenko2015-09-245-229/+210
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* New constraint manager and memory reporting 'ps'.Alan Mishchenko2015-09-083-6/+384
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* Changes to be able to compile ABC without CUDD.Alan Mishchenko2015-08-241-0/+1
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* New switch in 'read_lib' to replace gate/pin names by short strings.Alan Mishchenko2015-08-241-5/+44
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* New switch in 'read_lib' to replace gate/pin names by short strings.Alan Mishchenko2015-08-243-2/+105
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* Add fix to Liberty parser to skip extra semicolon.Alan Mishchenko2015-07-061-0/+5
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* Corner case bug in wire-cap estimation.Alan Mishchenko2015-02-181-0/+2
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* Several improvements to CBA data-structure.Alan Mishchenko2015-02-091-1/+1
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* Improvements and tuning of CBA with buffering/sizing.Alan Mishchenko2015-02-045-28/+77
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* Improvements and tuning of CBA.Alan Mishchenko2015-02-011-0/+2
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* Gate sizing with barrier buffers.Alan Mishchenko2014-12-213-1/+52
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* Integrating barrier buffers.Alan Mishchenko2014-12-135-10/+76
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* Support for leakage power in Liberty parser and sizer.Alan Mishchenko2014-09-165-5/+122
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* Suggested fix to allow .constr files to have empty lines.Alan Mishchenko2014-08-131-0/+2
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* Adding color to sizing stats.Alan Mishchenko2014-04-191-4/+4
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* Adding color to sizing stats.Alan Mishchenko2014-04-191-0/+26
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