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* Compiler warnings.Alan Mishchenko2017-01-071-1/+1
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* Adding truth table occurrence counters for 'if -c'.Alan Mishchenko2016-08-083-0/+14
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* Enabled progress bar in the 'if' mapper (warning).Alan Mishchenko2016-08-081-1/+1
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* Enabled delay computation for the cut output using cut inputs.Alan Mishchenko2016-08-083-2/+52
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* Enabled progress bar in the 'if' mapper.Alan Mishchenko2016-08-081-5/+5
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* Adding one argument to the delay-estimation API used for exact synthesis.Alan Mishchenko2016-07-311-3/+3
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* Infrastructure for using the results of exact SAT-based synthesis during ↵Alan Mishchenko2016-07-291-3/+25
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* Infrastructure for using the results of exact SAT-based synthesis during ↵Alan Mishchenko2016-07-293-17/+33
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* Adding option to rehash AIG after mapping.Alan Mishchenko2016-04-271-0/+1
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* Fixing mismatch in the TLS flow induced by adding cell configs in the DSD ↵Alan Mishchenko2016-01-301-1/+1
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* Compiler warnings.Alan Mishchenko2015-10-211-2/+2
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* Moving BDD-based threshold function detection to the BDD part of the code.Alan Mishchenko2015-10-162-0/+9
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* Two fixes in 'dsd_filter'.Alan Mishchenko2015-10-071-1/+1
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* Bug fix in 'if -g' (incorrect use of a macro).Alan Mishchenko2015-10-071-3/+3
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* Threshold logic checking code by Augusto Neutzling and Jody Matos.Alan Mishchenko2015-09-231-3/+6
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* Experiments with mapping plus small changes.Alan Mishchenko2015-08-233-3/+10
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* Small changes to enable collecting results using &ps -D file.Alan Mishchenko2015-07-092-0/+2
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* Bug fix in programmable cell parser and minor tuning.Alan Mishchenko2015-07-081-1/+2
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* C++ compiler typecast problem.Alan Mishchenko2015-07-081-1/+1
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* Undo recent assert.Alan Mishchenko2015-06-271-2/+2
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* Supporting AND-gate cuts in 'if' and '&if'Alan Mishchenko2015-06-213-6/+27
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* Bug fix in 'dsd_tune' when processing cells with 0-input LUTs.Alan Mishchenko2015-05-151-2/+7
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* Making sure 0-input LUTs are supported by the DSD matching code.Alan Mishchenko2015-05-141-5/+5
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* Support for representing programmable cell configuration data (bug fix).Alan Mishchenko2015-03-091-1/+4
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* Support for representing programmable cell configuration data.Alan Mishchenko2015-03-081-1/+2
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* Support for representing programmable cell configuration data.Alan Mishchenko2015-03-083-64/+222
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* Experiments with SAT-based cube enumeration.Alan Mishchenko2015-03-051-3/+4
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* Fixed a typo in variable names.Alan Mishchenko2015-02-071-2/+2
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* New assertions and bug fix in DSD balancing.Alan Mishchenko2015-01-272-8/+11
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* Exprimental features in tech-mapping.Alan Mishchenko2014-12-211-2/+3
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* Bug fix in reading box library.Alan Mishchenko2014-12-201-1/+1
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* Adding new mapping feature.Alan Mishchenko2014-12-114-18/+56
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* Bug fix in truth table computation.Alan Mishchenko2014-10-151-11/+9
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* MUX decomposition during mapping.Alan Mishchenko2014-10-111-1/+0
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* Deriving network in terms of programmable cells.Alan Mishchenko2014-10-111-1/+2
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* Small changes.Alan Mishchenko2014-10-081-0/+2
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* Compiler warnings.Alan Mishchenko2014-10-082-1/+3
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* Detection of threshold functions.Alan Mishchenko2014-10-082-0/+74
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* Deriving cell mapping with &if -kz.Alan Mishchenko2014-10-041-2/+9
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* Deriving cell mapping with &if -kz.Alan Mishchenko2014-10-043-15/+126
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* Deriving AIG after cell mapping.Alan Mishchenko2014-10-032-0/+11
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* Synchronizing packages.Alan Mishchenko2014-09-201-0/+2
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* Synchronizing packages.Alan Mishchenko2014-09-202-3/+3
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* Synchronizing packages.Alan Mishchenko2014-09-201-0/+2
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* Updating command 'dsd_clean'.Alan Mishchenko2014-09-203-3/+16
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* Updating DSD balance to handle XOR gate as having the same delay as AND gate.Alan Mishchenko2014-09-194-10/+11
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* Improvements to Boolean matching.Alan Mishchenko2014-09-192-33/+98
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* Improvements to Boolean matching.Alan Mishchenko2014-09-196-66/+474
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* Improvements to Boolean matching.Alan Mishchenko2014-09-182-6/+22
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* Improvements to Boolean matching.Alan Mishchenko2014-09-184-5/+29
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