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path: root/src/map/if/ifMan.c
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* Adding API to dump MiniAIG into a Verilog file and other small changes.Alan Mishchenko2017-10-221-0/+1
* Adding truth table occurrence counters for 'if -c'.Alan Mishchenko2016-08-081-0/+8
* Enabled delay computation for the cut output using cut inputs.Alan Mishchenko2016-08-081-0/+2
* Adding new mapping feature.Alan Mishchenko2014-12-111-0/+13
* Improvements to Boolean matching.Alan Mishchenko2014-09-191-2/+15
* Adding specialized matching to 'if'.Alan Mishchenko2014-08-161-1/+1
* Adding specialized matching to 'if'.Alan Mishchenko2014-08-161-0/+14
* Compiler warnings.Alan Mishchenko2014-08-041-1/+1
* Fixing option 'if -G <num>' after changes.Alan Mishchenko2014-07-251-2/+2
* Improvements to DSD balancing.Alan Mishchenko2014-04-191-2/+2
* Changes in the LUT mapper data-structures.Alan Mishchenko2014-04-141-22/+2
* Improvements to DSD in technology mapping.Alan Mishchenko2014-04-111-3/+0
* Improvements to DSD in technology mapping.Alan Mishchenko2014-04-111-1/+2
* Implementation of DSD balancing.Alan Mishchenko2014-04-061-2/+5
* Improvement in SOP balancing.Alan Mishchenko2014-04-061-16/+11
* Improvement in SOP balancing.Alan Mishchenko2014-04-061-0/+13
* Preparing new implementation of SOP/DSD balancing in 'if' mapper.Alan Mishchenko2014-04-051-0/+1
* Improvements to technology mapping.Alan Mishchenko2014-04-031-8/+18
* Improvements to technology mapping.Alan Mishchenko2014-04-031-3/+2
* Improvements to technology mapping.Alan Mishchenko2014-04-031-0/+1
* Improvements to technology mapping.Alan Mishchenko2014-04-031-0/+8
* Improvements to technology mapping.Alan Mishchenko2014-04-031-1/+6
* Improvements to technology mapping.Alan Mishchenko2014-04-021-3/+3
* Improvements to technology mapping.Alan Mishchenko2014-04-021-19/+30
* Improving cut computation.Alan Mishchenko2014-03-301-18/+3
* Updating &if for new cut function representation.Alan Mishchenko2014-03-291-4/+14
* Experiments with cut caching.Alan Mishchenko2014-03-201-0/+4
* Changes to LUT mappers.Alan Mishchenko2014-02-281-6/+16
* Changes to LUT mappers.Alan Mishchenko2014-02-281-1/+3
* Changes to LUT mappers.Alan Mishchenko2014-02-271-4/+8
* Changes to LUT mappers.Alan Mishchenko2014-02-251-3/+9
* Changes to LUT mappers.Alan Mishchenko2014-02-191-3/+0
* Changes to LUT mappers.Alan Mishchenko2014-02-171-14/+3
* Changes to LUT mappers.Alan Mishchenko2014-02-171-12/+3
* Significant improvement to LUT mappers (if, &if).Alan Mishchenko2014-02-161-23/+18
* Buf fixes and minor changes to the &if mapper.Alan Mishchenko2013-08-291-1/+2
* Adding code to count statistics about decomposable LUT5.Alan Mishchenko2013-08-181-0/+1
* Adding a wrapper around clock() for more accurate time counting in ABC.Alan Mishchenko2013-05-271-1/+1
* Improvements to the hierarchy/timing manager.Alan Mishchenko2013-03-051-4/+2
* Improvements to DSD manager.Alan Mishchenko2012-12-111-1/+1
* DSD manager.Alan Mishchenko2012-11-201-1/+2
* DSD manager.Alan Mishchenko2012-11-191-4/+13
* Improved DSD.Alan Mishchenko2012-11-101-1/+2
* Improved DSD.Alan Mishchenko2012-11-101-0/+19
* Improvements to the truth table computation in 'if' package.Alan Mishchenko2012-10-261-2/+1
* Integrating GIA with LUT mapping.Alan Mishchenko2012-10-241-0/+1
* Replacing Mb/Gb to be MB/GB.Alan Mishchenko2012-07-091-1/+1
* Adding on-the-fly truth-table minimization.Alan Mishchenko2012-04-281-0/+3
* Misc changes.Alan Mishchenko2012-04-221-2/+2
* Enabling mapping into multi-input AND/OR gates.Alan Mishchenko2012-03-271-0/+1
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