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iCE40/abc
yosys-experimental
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src
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map
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if
/
if.h
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Author
Age
Files
Lines
*
Improvements to the hierarchy/timing manager.
Alan Mishchenko
2013-03-05
1
-1
/
+2
*
Renaming If_Lut_t into If_LibLut_t.
Alan Mishchenko
2012-12-10
1
-15
/
+15
*
Adding box library.
Alan Mishchenko
2012-12-10
1
-1
/
+26
*
DSD manager.
Alan Mishchenko
2012-11-20
1
-0
/
+1
*
DSD manager.
Alan Mishchenko
2012-11-19
1
-2
/
+4
*
DSD manager.
Alan Mishchenko
2012-11-13
1
-1
/
+3
*
Improved DSD.
Alan Mishchenko
2012-11-10
1
-1
/
+6
*
Performance bug fix in choice generation.
Alan Mishchenko
2012-11-09
1
-1
/
+1
*
Improvements to LMS code.
Alan Mishchenko
2012-11-01
1
-0
/
+2
*
Move truth table code into a separte file.
Alan Mishchenko
2012-10-28
1
-1
/
+1
*
Improvements to LMS code.
Alan Mishchenko
2012-10-28
1
-1
/
+4
*
Improvements to LMS code.
Alan Mishchenko
2012-10-27
1
-0
/
+1
*
Improvements to the truth table computation in 'if' package.
Alan Mishchenko
2012-10-26
1
-2
/
+4
*
Added new API to traverse the cut in the mapper.
Alan Mishchenko
2012-10-25
1
-0
/
+1
*
Integrating GIA with LUT mapping.
Alan Mishchenko
2012-10-24
1
-1
/
+1
*
Upgrading hierarchy timing manager.
Alan Mishchenko
2012-09-21
1
-3
/
+2
*
Updated code for lazy man's synthesis.
Alan Mishchenko
2012-07-20
1
-0
/
+4
*
Updated code for lazy man's synthesis.
Alan Mishchenko
2012-07-15
1
-1
/
+5
*
Updating project settings to have simpler include paths.
Alan Mishchenko
2012-07-07
1
-3
/
+3
*
Fixing time primtouts throughout the code.
Alan Mishchenko
2012-07-07
1
-2
/
+2
*
Changing 'if' to allow for delay optimization on sequential paths only.
Alan Mishchenko
2012-05-20
1
-5
/
+7
*
Changing 'if' to allow for delay optimization on sequential paths only.
Alan Mishchenko
2012-05-20
1
-7
/
+8
*
Misc changes.
Alan Mishchenko
2012-05-03
1
-0
/
+2
*
Adding on-the-fly truth-table minimization.
Alan Mishchenko
2012-04-28
1
-0
/
+2
*
Enabling mapping into multi-input AND/OR gates.
Alan Mishchenko
2012-03-27
1
-0
/
+3
*
Alternative way of computing delay in SOP balancing.
Alan Mishchenko
2012-03-16
1
-0
/
+1
*
Experiment with technology mapping.
Alan Mishchenko
2012-02-22
1
-0
/
+13
*
Major restructuring of the code.
Alan Mishchenko
2012-01-21
1
-5
/
+5
*
Changes to the lazy man's synthesis code.
Alan Mishchenko
2012-01-17
1
-1
/
+1
*
Several small bug fixes in the mapper.
Alan Mishchenko
2012-01-15
1
-2
/
+2
*
Changes to the lazy man's synthesis code.
Alan Mishchenko
2012-01-11
1
-0
/
+1
*
Delay optimization using precomputed library.
Alan Mishchenko
2011-12-29
1
-0
/
+4
*
Performance bug fix in SOP balancing.
Alan Mishchenko
2011-12-06
1
-0
/
+5
*
C++ portability changes.
Alan Mishchenko
2011-10-27
1
-0
/
+4
*
Changes to the matching procedure.
Alan Mishchenko
2011-10-10
1
-6
/
+4
*
Changes to the matching procedure.
Alan Mishchenko
2011-10-02
1
-5
/
+12
*
Changes to the matching procedure.
Alan Mishchenko
2011-10-01
1
-5
/
+9
*
Changes to Boolean matching.
Alan Mishchenko
2011-09-24
1
-0
/
+3
*
Other changes to enable new features in the mapper (bug fix).
Alan Mishchenko
2011-07-20
1
-1
/
+2
*
Other changes to enable new features in the mapper.
Alan Mishchenko
2011-07-10
1
-2
/
+3
*
Initial changes to enable new features in the mapper
Alan Mishchenko
2011-07-08
1
-1
/
+3
*
Added another specialized check to the mapper.
Alan Mishchenko
2011-06-27
1
-3
/
+5
*
Added new mapping feature.
Alan Mishchenko
2011-06-20
1
-0
/
+2
*
Updated technology mapping.
Alan Mishchenko
2011-05-08
1
-0
/
+2
*
Updated technology mapping.
Alan Mishchenko
2011-05-07
1
-1
/
+2
*
Added switch to control duplication of logic after mapping.
Alan Mishchenko
2011-04-24
1
-0
/
+1
*
initial commit of public abc
Alan Mishchenko
2010-11-01
1
-21
/
+54
*
Version abc90215
Alan Mishchenko
2009-02-15
1
-10
/
+10
*
Version abc90118
Alan Mishchenko
2009-01-18
1
-0
/
+9
*
Version abc80702
Alan Mishchenko
2008-07-02
1
-1
/
+1
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